SN54ALS165, SN74ALS165
PARALLEL-LOAD 8-BIT REGISTERS
SDAS157B – JUNE 1982 – REVISED DECEMBER 1994
switching characteristics (see Figures 1, 2, and 3)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
†
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54ALS165 SN74ALS165
MIN
35
4
MAX
MIN
45
4
MAX
f
t
t
t
t
t
t
t
t
MHz
ns
max
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
23
23
14
15
14
18
17
17
20
22
13
14
13
16
15
16
Any
Any
SH/LD
CLK
4
4
3
3
ns
ns
ns
3
3
3
3
Q
H
H
H
3
3
2
2
Q
H
3
3
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PARAMETER MEASUREMENT INFORMATION
3.5 V
(disable while
clock is high)
CLK INH
CLK
V
ref
0.3 V
t
su1
3.5 V
V
ref
V
ref
V
ref
0.3 V
t
t
t
w(CLK)
su2
w(CLK)
F and H
Inputs
(see Notes
A and B)
3.5 V
0.3 V
V
ref
V
V
V
ref
ref
ref
t
su2
t
w(load)
t
w(load)
3.5 V
0.3 V
SH/LD
V
V
V
ref
V
ref
ref
ref
t
t
t
t
t
t
PHL
PLH
PHL
PLH
PHL
PLH
V
OH
OL
OH
OL
Output
V
V
V
V
V
ref
ref
ref
ref
ref
Q
H
V
t
t
t
t
t
PHL
PHL
PLH
PHL
PLH
t
PLH
Output
V
V
ref
V
ref
V
ref
V
ref
V
ref
V
ref
Q
H
V
NOTES: A. The remaining six data inputs and SER are low.
B. Prior to test, high-level data is loaded into the H input.
C. The input pulse generators have the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, t = t = 2 ns.
r
f
D.
V
ref
= 1.3 V
Figure 1. Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ROCHESTER [ Rochester Electronics ]
