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RT3667BL 参数 Datasheet PDF下载

RT3667BL图片预览
型号: RT3667BL
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用:
文件页数/大小: 43 页 / 558 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT3667BL  
Operation  
Error Amp  
MUX and ADC  
Error amplifier generates COMP/COMPA signal by the  
difference between VSET/VSETAand FB/FBA.  
The MUX supports the inputs from SET1, SET2, SET3,  
OFS, OFSA, IMON, IMONA, VSEN, or VSENA. TheADC  
converts these analog signals to digital codes for reporting  
or performance adjustment.  
Offset cancellation  
This block cancels the output offset voltage from voltage  
ripple and current ripple to achieve accurate output voltage.  
SVI2 Interface  
The SVI2 interface uses the SVC, SVD, and SVT pins to  
communicate with CPU. The RT3667BL's performance and  
behavior can be adjusted by commands sent by CPU or  
platform.  
PWM CMPx  
The PWM comparator compares COMP signal and current  
feedback signal to generate a signal for TONGENx.  
TONGEN/TONGENA  
UVLO  
This block generates an on-time pulse which high interval  
is based on the on-time setting and current balance.  
The UVLO detects the VCC pin voltages for under-voltage  
lockout protection and power on reset operation.  
Current Balance  
Loop Control Protection Logic  
Per-phase current is sensed and adjusted by adjusting  
on-time of each phase to achieve current balance for each  
phase.  
Loop control protection logic detects ENand UVLO signals  
to initiate soft-start function and control PGOOD,  
PGOODA and OCP_L signals after soft-start is finished.  
When dual OCP event occurs, the OCP_L pin voltage will  
be pulled low.  
OC/OV/UV/NV  
VSEN/VSENA and output current are sensed for over-  
current, over-voltage, under-voltage, and negative voltage  
protection.  
DAC  
The DAC receives VID codes from the SVI2 control logic  
to generate an internal reference voltage (VSET/VSETA)  
for controller.  
RSET/RSETA  
The Ramp generator is designed to improve noise immunity  
and reduce jitter.  
Soft-Start and Slew-Rate Control  
This block controls the slew rate of the internal reference  
voltage when output voltage changes.  
Copyright 2019 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DS3667BL-00 September 2019  
www.richtek.com  
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