RT3663BH
Table 2. SET1 Pin Setting for VDD Controller OCP_TDC threshold, DVID Compensation
and RSET under VCC5 = 5V
SET1 Pin
Voltage
Before
Current
Injection
VSET1 (mV)
SET1 Pin
Voltage
Before
Current
Injection
OCP_TDC
(Respect
to OCP_
SPIKE)
OCP_TDC
(Respect
to OCP_
SPIKE)
DVID
DVID
Compensation RSET
[1]
Compensation RSET
[1]
VSET1 (mV)
34
145%
130%
836
861
145%
130%
59
85
115%
886
115%
60%
70%
0
60%
70%
1
110
135
160
235
260
285
310
335
360
435
460
485
510
535
560
636
661
686
711
736
761
100%
911
100%
85%
70%
936
85%
70%
961
145%
130%
1036
1061
1086
1112
1137
1162
1237
1262
1287
1312
1337
1362
1437
1462
1487
1512
1537
1562
145%
130%
115%
115%
0
1
100%
100%
85%
70%
85%
70%
145%
130%
145%
130%
115%
115%
75%
0
75%
1
100%
100%
85%
70%
85%
70%
145%
130%
145%
130%
115%
115%
Disable
0
Disable
1
100%
100%
85%
70%
85%
70%
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is a registered trademark of Richtek Technology Corporation.
DS3663BH-01 July 2019
www.richtek.com
9
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