IX. AC Electrical Characteristic
(Typical values taken at VDD = +3.0V, TA = +25°C, unless otherwise noted)
Limit Values
Parameter
Sym
Notes
Unit
Test Conditions
min
typ
max
PLL Performance
VCO Gain
KVCO
280
-75
-74
-98
-98
300
-40
-56
-52
-56
-65
MHz/V
dBc/Hz
315 Mhz Band
Freq Offset =
100kHz
433 Mhz Band
315 Mhz Band
433 Mhz Band
Phase Noise
Freq Offset = 1MHz
Loop BW
BW
kHz
dBc
Reference Spur
315 Mhz Band
433 Mhz Band
315 Mhz Band
433 Mhz Band
2nd Harmonic
3rd Harmonic
dBc
dBc
Crystal
Frequency Range
Tolerance
fREF
fRF/32
50
MHz
ppm
pF
fundamental mode, AT
3
2
Internal Load Capacitance
Clock Output Frequency
System Characteristics
Frequency Range
3
CLKOUT
FXTAL/N
MHz
Determined by CLK1 and CLK2
300
450
16.1
12.4
MHz
dBm
12.2
10
TA = -40C, VDD = +3.6V
into 50W matched
Output Power
4
6.1
2.7
TA = +25C, VDD = +3.0V
TA = +125C, VDD = +2.1V
load
5.3
160
300
20
Start-up time
Rise Time
tON
tr
5
5
µs
ns
STDBY to Tx
FSK (50% Duty Cycle)
ASK (50% Duty Cycle)
Max Data Rate
5
4
kbps
kHz
100
55
315 Mhz Band
Frequency Deviation (FSK)
DEV[2..0]=111
CW
80
433 Mhz Band
315 Mhz Band
433 Mhz Band
315 Mhz Band
433 Mhz Band
35
31
Transmit Efficiency
%
h=POUT/(VDDxIDD
)
27
50% duty cycle
25
Power ON/OFF Ratio
-77
4
dB
ASK Mode
Frequency Stability vs. VDD
Frequency Stability vs.
Temp
kHz
DdfVDD
DdfTA
TBD
kHz
-40°C to +85°C
Notes:
1. 10kHz, 50% duty cycle
2. Dependent on PCB parasitic trace capacitance and crystal parameters.
3. Dependent on crystal parameters.
4. Transmit Efficiency, RF Output Power, and Supply Current are heavily dependent on proper output matching and PCB layout.
5. No Envelope Shaping.
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RFM [ RF MONOLITHICS, INC ]
