V. Pin Configuration
BOTTOM VIEW
3x3mm
13
14
15
16
Dev1
VDD
1
2
3
4
12
Dev0
Clk1
Clk0
11
10
ModeSel
DataIN
Stdby
9
8
7
5
6
VI. Pin Description
Pin
Name
Description
1
VDD
VDD is the supply voltage for the PLL and Logic. Bypass as close as possible to pin with 1µF, .01µF, 220pf.
Mode Select enables the chip to be set in ASK or FSK mode
Low: ASK mode
High: FSK mode
ASK, FSK Mode Selection
The Mode Select pin (2) sets the transmit mode of the device. A logic low sets the mode to ASK modulation. A logic high sets the device
to FSK modulation.
2
ModeSel
In ASK mode, data driven onto the DataIN pin (3) gates the internal power amplifier. A data “High” turns the power amplifier on and thus
drives the RF signal to the antenna. A data “Low” turns off the power amplifier.
In FSK mode, data driven onto the DataIN pin shifts the carrier frequency by the amount programmed through the DEV[2..0] pins
(13,12,11). A data “Low” performs no shift. The frequency of a data “Low” in FSK mode is the same frequency of a data “High” in ASK
mode. The FSK deviation is achieved by pulling the crystal frequency. See Crystal Reference section (pin 15) for more details. The
maximum deviation for the 315MHz band and 433MHz band is approximately 55 kHz and 80 kHz, respectively.
Data Input enables the turning on and off of the Power Amplifier in ASK mode and selection of high or low frequency in FSK mode.
Low (ASK mode): Power Amplifier off
High (ASK mode): Power Amplifier on
3
DataIN
Low (FSK mode): Low frequency
High (FSK mode): High frequency
Standby enables selection of low power shutdown/standby mode
Low or if left unconnected: Sets device in Standby mode
High: Sets device in Ready for transmission mode
Note: Lowest current consumption achieved when all config pins at Logic Low.
4
Stdby
Standby Mode
The Standby pin (4) sets the device in low power shutdown, pulling only 0.2nA. When the device is brought out of standby with a logic
“High”, it is ready for operation within 200us. The Standby pin has an internal pull-down resistor so this pin can be pulled low or left
unconnected. The 200us turn-on time is due to crystal start-up. An optimally matched crystal will minimize this turn-on time. See Crystal
Reference section (pin 15) for details on crystal load matching.
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