Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NL, M16C/6NN)
1. Overview
Table 1.4 List of Pin Names for 100-Pin Package (1)
Control
Pin
Interrupt
Pin
Analog CAN Module Bus Control
Pin Pin Pin
DA1
DA0
Pin No.
Port
Timer Pin
UART Pin
1
P9_4
P9_3
P9_2
P9_1
P9_0
TB4IN
2
TB3IN
TB2IN
TB1IN
TB0IN
3
SOUT3
4
SIN3
5
CLK3
6
BYTE
CNVSS
XCIN
7
8
P8_7
9
XCOUT P8_6
_____________
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
RESET
XOUT
VSS
XIN
VCC1
P8_5
P8_4
P8_3
P8_2
P8_1
P8_0
P7_7
P7_6
P7_5
P7_4
P7_3
P7_2
P7_1
P7_0
P6_7
P6_6
P6_5
P6_4
P6_3
P6_2
P6_1
P6_0
P5_7
P5_6
P5_5
P5_4
P5_3
P5_2
P5_1
P5_0
P4_7
P4_6
P4_5
P4_4
P4_3
P4_2
________
NMI
_________
INT2
ZP
_________
INT1
_________
INT0
___
TA4IN/U
TA4OUT/U
TA3IN
(SIN4)
TA3OUT
____
TA2IN/W
(SOUT4)
TA2OUT/W
(CLK4)
___
__________ __________
TA1IN/V
CTS2/RTS2
CLK2
TA1OUT/V
TA0IN/TB5IN RXD2/SCL2
TA0OUT
TXD2/SDA2
TXD1/SDA1
RXD1/SCL1
CLK1
_________ _________ _________
CTS1/RTS1/CTS0/CLKS1
TXD0/SDA0
RXD0/SCL0
CLK0
__________ __________
CTS0/RTS0
_________
RDY/CLKOUT
ALE
___________
HOLD
___________
HLDA
BCLK
______
RD
__________________
WRH/BHE
_________ ______
WRL/WR
_______
CS3
_______
CS2
_______
CS1
_______
CS0
A19
A18
Rev.2.10 Aug 25, 2006 page 7 of 67
REJ03B0061-0210
RENESAS [ RENESAS TECHNOLOGY CORP ]
