VRS51C1000
Instruction Set
Size
(bytes)
Mnemonic
Description
Instr. Cycles
Boolean Instruction
CLR C
CLR bit
SETB C
SETB bit
CPL C
The following table describes the instruction set of the
VRS51C1000. The instructions are function and binary
code compatible with industry standard 8051s.
Clear Carry bit
Clear bit
Set Carry bit to 1
Set bit to 1
Complement Carry bit
Complement bit
Logical AND between Carry and bit
Logical AND between Carry and not bit
Logical ORL between Carry and bit
Logical ORL between Carry and not bit
Copy bit value into Carry
Copy Carry value into Bit
1
2
1
2
1
2
2
2
2
2
2
2
1
1
1
1
1
1
2
2
2
2
1
2
CPL bit
Table 3: Legend for Instruction Set Table
ANL C,bit
ANL C,#bit
ORL C,bit
ORL C,#bit
MOV C,bit
MOV bit,C
Data Transfer Instructions
MOV A, Rn
MOV A, direct
MOV A, @Ri
MOV A, #data
MOV Rn, A
MOV Rn, direct
MOV Rn, #data
MOV direct, A
MOV direct, Rn
MOV direct, direct
MOV direct, @Ri
MOV direct, #data
MOV @Ri, A
MOV @Ri, direct
MOV @Ri, #data
MOV DPTR, #data
MOVC A, @A+DPTR
Symbol
A
Function
Accumulator
Rn
Register R0-R7
Direct
@Ri
rel
Internal register address
Internal register pointed to by R0 or R1 (except MOVX)
Two's complement offset byte
Direct bit address
bit
Move register to A
Move direct byte to A
Move data memory to A
Move immediate to A
1
2
1
2
1
2
2
2
2
3
2
3
1
2
2
3
1
1
1
1
1
1
2
2
1
2
1
1
1
1
1
1
1
2
1
1
2
2
2
2
1
2
1
2
2
2
2
2
2
2
2
2
1
1
1
1
#data
#data 16
addr 16
addr 11
8-bit constant
16-bit constant
16-bit destination address
11-bit destination address
Move A to register
Move direct byte to register
Move immediate to register
Move A to direct byte
Move register to direct byte
Move direct byte to direct byte
Move data memory to direct byte
Move immediate to direct byte
Move A to data memory
Move direct byte to data memory
Move immediate to data memory
Move immediate to data pointer
Move code byte relative DPTR to A
Move code byte relative PC to A
Move external data (A8) to A
Move external data (A16) to A
Move A to external data (A8)
Move A to external data (A16)
Push direct byte onto stack
Pop direct byte from stack
Exchange A and register
TABLE 4: VRS51C1000 INSTRUCTION SET
Size
(bytes)
Mnemonic
Description
Instr. Cycles
Arithmetic instructions
ADD A, Rn
ADD A, direct
ADD A, @Ri
ADD A, #data
ADDC A, Rn
ADDC A, direct
ADDC A, @Ri
ADDC A, #data
SUBB A, Rn
SUBB A, direct
SUBB A, @Ri
SUBB A, #data
INC A
INC Rn
INC direct
INC @Ri
DEC A
DEC Rn
DEC direct
DEC @Ri
INC DPTR
MUL AB
Add register to A
Add direct byte to A
Add data memory to A
Add immediate to A
Add register to A with carry
Add direct byte to A with carry
Add data memory to A with carry
Add immediate to A with carry
Subtract register from A with borrow
Subtract direct byte from A with borrow
Subtract data mem from A with borrow
Subtract immediate from A with borrow
Increment A
Increment register
Increment direct byte
Increment data memory
Decrement A
Decrement register
Decrement direct byte
Decrement data memory
Increment data pointer
Multiply A by B
Divide A by B
Decimal adjust A
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
4
4
1
MOVC A, @A+PC
MOVX A, @Ri
MOVX A, @DPTR
MOVX @Ri, A
MOVX @DPTR, A
PUSH direct
POP direct
XCH A, Rn
XCH A, direct
XCH A, @Ri
XCHD A, @Ri
Branching Instructions
ACALL addr 11
LCALL addr 16
RET
Exchange A and direct byte
Exchange A and data memory
Exchange A and data memory nibble
Absolute call to subroutine
Long call to subroutine
Return from subroutine
Return from interrupt
Absolute jump unconditional
Long jump unconditional
Short jump (relative address)
Jump on carry = 1
Jump on carry = 0
Jump on direct bit = 1
Jump on direct bit = 0
Jump on direct bit = 1 and clear
Jump indirect relative DPTR
Jump on accumulator = 0
Jump on accumulator 1= 0
Compare A, direct JNE relative
Compare A, immediate JNE relative
Compare reg, immediate JNE relative
Compare ind, immediate JNE relative
Decrement register, JNZ relative
Decrement direct byte, JNZ relative
2
3
1
1
2
3
2
2
2
3
3
3
1
2
2
3
3
3
3
2
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
RETI
DIV AB
DA A
AJMP addr 11
LJMP addr 16
SJMP rel
JC rel
JNC rel
JB bit, rel
JNB bit, rel
JBC bit, rel
JMP @A+DPTR
JZ rel
Logical Instructions
ANL A, Rn
ANL A, direct
ANL A, @Ri
ANL A, #data
ANL direct, A
ANL direct, #data
ORL A, Rn
ORL A, direct
ORL A, @Ri
ORL A, #data
ORL direct, A
ORL direct, #data
XRL A, Rn
XRL A, direct
XRL A, @Ri
XRL A, #data
XRL direct, A
XRL direct, #data
CLR A
AND register to A
AND direct byte to A
AND data memory to A
AND immediate to A
AND A to direct byte
AND immediate data to direct byte
OR register to A
OR direct byte to A
OR data memory to A
OR immediate to A
OR A to direct byte
OR immediate data to direct byte
Exclusive-OR register to A
Exclusive-OR direct byte to A
Exclusive-OR data memory to A
Exclusive-OR immediate to A
Exclusive-OR A to direct byte
Exclusive-OR immediate to direct byte
Clear A
Compliment A
Swap nibbles of A
Rotate A left
Rotate A left through carry
Rotate A right
1
2
1
2
2
3
1
2
1
2
2
3
1
2
1
2
2
3
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
1
JNZ rel
CJNE A, direct, rel
CJNE A, #d, rel
CJNE Rn, #d, rel
CJNE @Ri, #d, rel
DJNZ Rn, rel
DJNZ direct, rel
Miscellaneous Instruction
NOP
No operation
1
1
Rn:
@Ri:
Any of the register R0 to R7
Indirect addressing using Register R0 or R1
CPL A
SWAP A
RL A
RLC A
RR A
RRC A
#data: immediate Data provided with Instruction
#data16: Immediate data included with instruction
bit:
rel:
address at the bit level
relative address to Program counter from +127 to –128
Addr11: 11-bit address range
Addr16: 16-bit address range
Rotate A right through carry
#d:
Immediate Data supplied with instruction
______________________________________________________________________________________________
www.ramtron.com page 4 of 48
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
