CAS2/150MHz HSDRAM
64MB, 128MB DIMM
Preliminary Data Sheet
128MB ECC DIMM Functional Block Diagram – SM12809DT-6.6
S0#
S1#
Clock Wiring
DQMB0
DQ(7:0)
DQMB4
5 SDRAM
5 SDRAM
4 SDRAM+3.3 pf
4 SDRAM+3.3 pf
CK0
CK1
CK2
CK3
U5
U6
U14
U15
U0
U1
U2
U9
U10
U11
DQ(39:32)
DQMB5
DQMB1
DQ(47:40)
DQ(15:8)
10
CK0-3
SCL
SDRAMs
Note: SDRAM U11 DQM input MUST
be wired to DQMB5
CB(7:0)
S2#
SDA
S3#
Serial PD
WP
SA0-2
47K
DQMB2
DQMB6
U7
U8
U16
U17
U3
U4
U12
U13
DQ(55:48)
DQ(23:16)
BA0
BA1
BA0 SDRAM U0-17
BA1 SDRAM U0-17
A0-A11 SDRAM U0-17
Vdd SDRAM U0-17
DQMB7
DQMB3
A0-A11
Vdd
DQ(63:56)
DQ(31:24)
Vss
Vss SDRAM U0-17
RAS#
RAS# SDRAM U0-17
CAS# SDRAM U0-17
WE# SDRAM U0-17
CKE0 SDRAM U0-8
CAS#
WE#
CKE0
Vdd
10K
CKE1
CKE1 SDRAM U9-17
Note: All DQ resistor values are 10 ohms
All CK resistor values are 10 ohms
U0-U15 are SM3603T-6.6
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
2000 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
Revision 1.0
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