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FM24C64C-G 参数 Datasheet PDF下载

FM24C64C-G图片预览
型号: FM24C64C-G
PDF下载: 下载PDF文件 查看货源
内容描述: 64Kb的串行5V F-RAM存储器 [64Kb Serial 5V F-RAM Memory]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 12 页 / 270 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
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FM24C64C  
Electrical Specifications  
Absolute Maximum Ratings  
Symbol  
Description  
Ratings  
VDD  
VIN  
Power Supply Voltage with respect to VSS  
Voltage on any signal pin with respect to VSS  
-1.0V to +7.0V  
-1.0V to +7.0V  
and VIN < VDD+1.0V *  
TSTG  
TLEAD  
VESD  
Storage Temperature  
Lead Temperature (Soldering, 10 seconds)  
Electrostatic Discharge Voltage  
-55C to + 125C  
260C  
- Human Body Model (AEC-Q100-002 Rev. E)  
- Charged Device Model (AEC-Q100-011 Rev. B)  
- Machine Model (AEC-Q100-003 Rev. E)  
Package Moisture Sensitivity Level  
2.5kV  
1.25kV  
100V  
MSL-1  
* Exception: The “VIN < VDD+1.0V” restriction does not apply to the SCL and SDA inputs.  
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating  
only, and the functional operation of the device at these or any other conditions above those listed in the operational section of  
this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device  
reliability.  
DC Operating Conditions (TA = -40C to + 85C, VDD = 4.5V to 5.5V unless otherwise specified)  
Symbol  
VDD  
Parameter  
Main Power Supply  
Min  
4.5  
Typ  
5.0  
Max  
5.5  
Units  
V
Notes  
IDD  
VDD Supply Current  
@ SCL = 100 kHz  
@ SCL = 400 kHz  
@ SCL = 1 MHz  
1
100  
200  
400  
A  
A  
A  
A  
A  
A  
V
ISB  
ILI  
ILO  
VIL  
VIH  
VOL  
Standby Current  
Input Leakage Current  
Output Leakage Current  
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
@ IOL = 3 mA  
4
10  
±1  
±1  
2
3
3
-0.3  
0.7 VDD  
0.3 VDD  
VDD + 0.3  
0.4  
V
V
RIN  
Input Resistance (WP, A2-A0)  
For VIN = VIL (max)  
For VIN = VIH (min)  
40  
1
5
4
K  
M  
V
VHYS  
Input Hysteresis  
0.05 VDD  
Notes  
1. SCL toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V  
2. SCL = SDA = VDD. All inputs VSS or VDD. Stop command issued.  
3. VIN or VOUT = VSS to VDD. Does not apply to WP, A2-A0 pins.  
4. This parameter is characterized but not tested.  
5. The input pull-down circuit is strong (40K) when the input voltage is below VIL and much weaker (1M)  
when the input voltage is above VIH.  
Rev. 1.1  
June 2011  
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