P4C1024
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-15
-20
-25
-35
-45
-55
-70
-85
-100
-120
Symbol Parameter Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit
Read Cycle
Time
tRC
15
20
25
35
45
55
70
85
100
120
ns
Address
tAA
tAC
15
15
20
20
25
25
35
35
45
45
55
55
70
70
85
85
100
100
120 ns
120 ns
Access Time
Chip Enable
Access Time
Output Hold
from Address
Change
tOH
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
ns
Chip Enable to
Output in Low Z
tLZ
ns
Chip Disable
to Output in
High Z
Output Enable
Low to Data
Valid
tHZ
8
7
9
9
11
11
15
15
20
20
25
25
30
30
35
35
40
40
50 ns
tOE
50 ns
Output Enable
Low to Low Z
Output Enable
High to High Z
Chip Enable to
Power Up
Time
Chip Disable
to Power Down
Time
tOLZ
tOHZ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ns
7
9
11
15
20
25
30
35
40
40
45
50 ns
tPU
ns
tPD
12
20
20
20
25
30
35
50 ns
TIMING WAVEFORM OF READ CYCLE NO. 1 (OE CONTROLLED)(5)
Notes:
5. WE is HIGH for READ cycle.
8. Transition is measured ± 200 mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
6. CE1 is LOW, CE2 is HIGH and OE is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with CE1 transition
LOW and CE2 transition HIGH.
Document # SRAM124 REV A
Page 4 of 14
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
