June 2005
ASM2P3807AH
rev 0.2
Pin Configuration
IN
VCC
O10
O9
1
2
3
4
20
19
18
17
GND
A
S
O1
VCC
O2
M
2
GND
P
3
O8
5
16
15
14
13
12
11
VCC
O7
6
GND
O3
8
0
7
7
GND
O6
8
VCC
A
H
9
O4
O5
10
GND
SOIC / SSOP/ QSOP Packages
TOP VIEW
Pin Description
Pin#
1
Pin Names
I N
Description
Clock Inputs
Clock Outputs
Ground
3,5,7,9,11,12,14,16,18,19
2,6,10,13,17
4,8,15,20
O 1-O10
GND
Vcc
Power
Absolute Maximum Ratings
Symbol
Description
Max
–0.5 to +4.6
Unit
V
1
VTERM
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
2
VTERM
–0.5 to +7
–0.5 to VCC+0.5
–65 to +150
–60 to +60
V
V
3
VTERM
TSTG
IOUT
° C
mA
DC Output Current
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
NOTES:
1. VCC terminals.
2. Input terminals.
3. Outputs and I/O terminals.
3.3V CMOS 1-TO-10 CLOCK DRIVER
2 of 19
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
