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ASM2P20807A-20-AR 参数 Datasheet PDF下载

ASM2P20807A-20-AR图片预览
型号: ASM2P20807A-20-AR
PDF下载: 下载PDF文件 查看货源
内容描述: [Low Skew Clock Driver, 20807 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.209 INCH, SSOP-20]
分类和应用: 驱动光电二极管逻辑集成电路
文件页数/大小: 12 页 / 479 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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January 2006  
rev 0.2  
ASM2P20807A  
Pin Configuration  
IN  
GND  
O1  
VCC  
O10  
1
2
20  
19  
A
S
M
2
O9  
3
18  
17  
GND  
VCC  
4
O2  
O8  
P
2
5
6
16  
15  
14  
13  
12  
11  
VCC  
O7  
GND  
O3  
0
8
7
0
GND  
8
VCC  
O4  
7
A
O6  
O5  
9
10  
GND  
SSOP/ QSOP PACKAGE  
TOP VIEW  
Pin Description  
Pin #  
1
Pin Names  
Description  
I N  
Clock Input  
Clock Outputs  
Ground  
3,5,7,9,11,12,14,16,18,19  
2,6,10,13,17  
O1-O10  
GND  
VCC  
4,8,15,20  
Power supply  
Capacitance (TA = +25°C, f = 1.0MHz)  
Symbol  
Parameter1  
Input Capacitance  
Conditions  
VIN = 0V  
Typ  
3
Max  
4
Unit  
pF  
CIN  
NOTE:1. This parameter is measured at characterization but not tested.  
Absolute Maximum Ratings1  
Symbol  
Description  
Terminal Voltage with Respect to GND  
Max  
-0.5 to +4.6  
Unit  
V
2
VTERM  
3
VTERM  
Terminal Voltage with Respect to GND  
Terminal Voltage with Respect to GND  
Storage Temperature  
-0.5 to +5.5  
-0.5 to VCC+0.5  
-65 to +150  
-60 to +60  
V
V
4
VTERM  
TSTG  
IOUT  
° C  
mA  
DC Output Current  
NOTES:  
1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect  
device reliability.  
2. VCC terminals.  
3. Input terminals.  
4. Outputs and I/O terminals.  
2.5V CMOS 1-TO-10 CLOCK DRIVER  
2 of 12  
Notice: The information in this document is subject to change without notice.