January 2006
ASM2P20805A
rev 0.2
Switching Characteristics Over Operating Range3,4
Symbol
Parameter
Conditions1
Min2
Max
3
Unit
nS
tPLH
tPHL
Propagation Delay
1
-
INA to OAn, INB to OBn
Output Rise Time
tR
1.5
nS
(Measured from 0.8V to 2V)
Output Fall Time
tF
-
1.5
nS
(Measured from 2V to 0.8V)
Same device output pin to pin skew5
tSK(O)
tSK(P)
tSK(PP)
-
270
270
550
5.2
pS
CL= 15pF
Pulse skew6,9
-
pS
f ≤133MHz
Part to part skew7
-
pS
Output Enable Time
tPZL
tPZH
tPLZ
tPHZ
-
nS
¯¯
¯¯
OEA to OAn, OEB to OBn
Output Disable Time
-
5.2
nS
¯¯
¯¯
OEA to OAn, OEB to OBn
fMAX
Input Frequency
-
133
2.5
MHz
nS
tPLH
tPHL
Propagation Delay
0.5
-
INA to OAn, INB to OBn
Output Rise Time
tR
1.25
1.25
200
270
550
5.2
nS
(Measured from 0.7V to 1.7V)
Output Fall Time
tF
-
nS
(Measured from 1.7V to 0.7V)
Same device output pin to pin skew5
tSK(O)
tSK(P)
tSK(PP)
-
pS
CL= 15pF
Pulse skew6,9
-
pS
133MHz ≤ f ≤166MHz
Part to part skew7
-
pS
Output Enable Time
tPZL
tPZH
tPLZ
tPHZ
-
nS
¯¯
¯¯
OEA to OAn, OEB to OBn
Output Disable Time
-
5.2
nS
¯¯
¯¯
OEA to OAn, OEB to OBn
fMAX
Input Frequency
-
166
MHz
Notes:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH and tPHL are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not
imply skew.
5. Skew measured between all outputs under identical transitions and load conditions.
6. Skew measured is difference between propagation delay times tPHL and tPLH of same outputs under identical load conditions.
7. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature.
8. Airflow of 1m/s is recommended for frequencies above 133MHz.
9. This parameter is measured using f = 1MHz.
2.5V CMOS Dual 1-To-5 Clock Driver
5 of 12
Notice: The information in this document is subject to change without notice.