January 2006
ASM2P20805A
rev 0.2
Pin Description
Pin #
Pin Names
O¯¯EA, O¯¯EB
INA, INB
Description
9,12
10,11
3-State Output Enable Inputs (Active LOW)
Clock Inputs
2,3,4,6,7
OA1-OA5
OB1-OB5
Clock Outputs
19,18,17,15,14
Clock Outputs
1
20
5
VCCA
VCCB
Power supply for Bank A
Power supply for Bank B
Ground for Bank A
Ground for Bank B
Ground
GNDA
GNDB
GNDQ
MON
16
8
13
Monitor Output
Function Table
Inputs
Outputs
O¯¯EA, O¯¯EB
INA, INB
OAn, OBn
MON
L
L
L
H
L
L
H
Z
Z
L
H
L
H
H
H
H
Note: H = HIGH; L = LOW; Z = High-Impedance
Capacitance (TA = +25°C, f = 1.0MHz)
Symbol
CIN
Parameter*
Conditions
VIN= 0V
Typ
Max
Unit
pF
Input Capacitance
Output Capacitance
3
-
4
6
COUT
VOUT = 0V
pF
*This parameter is measured at characterization but not tested.
2.5V CMOS Dual 1-To-5 Clock Driver
2 of 12
Notice: The information in this document is subject to change without notice.