LNK623-626
Primary Side
Secondary Side
Drain trace area
miniminzed
Output Filter
Capacitor
Output
Rectifiers
Input Filter
Capacitor
Clamp
Isolation Barrier
Components
C11
VR1
R2
C1
Y1-
C3
Copper area
Capacitor
(optional)
C12
L1
T1
maximized for
heatsinking
D9
R10
C13
L3
D7
R1
D5
C8
C2
U1
S
S
S
S
D
D1
D3
L2
D4
Transformer
R3
BP
JP1
C9
D2
C10
FB
R4
C4
R9
D8
R8
F1
C5
RV1
RT1
R7
R5
R6
C6
J2
D6
J1
1
6
ESD
spark gap
Bypass
10 mil
gap
Feedback
Resistors close
to device
DC Outputs
AC
IN
+
-
Capacitor
close to device
PI-5269-122408
Figure 5. PCB Layout Example.
B+
B+
CLAMP
CLAMP
Small FB
pin node
area
D
S
D
FB
BP
FB
BP
Bias resistor
S
Minimize FB
pin node
area
PRI RTN
PRI RTN
Kelvin connection at
Source pin, no power
currents in signal traces
Bias currents
return to bulk
capacitor
PI-5266-110308
Bias currents
return to bulk
capacitor
Kelvin connection at
Source pin, no power
currents in signal traces
PI-5265-110308
Figure 6. Schematic Representation of Recommended Layout Without
External Bias.
Figure 7. Schematic Representation of Recommended Layout With
External Bias.
6
Rev. E 09/09
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