LNK562-564
TOP VIEW
FB
BP
CBP
D
Input Filter
Capacitor
S
S
S
S
Tr a n s f o r m e r
HV DC
INPUT
+
-
+
DC
OUT
-
Maximize hatched copper
areas (
) for optimum
heatsinking
Output Filter
Capacitor
PI-4157-101305
Figure 6. Recommended Circuit Board Layout for LinkSwitch-LP (Assumes a HVDC Input Stage).
Primary Loop Area
rectifier. This effectively filters the leakage inductance spike
and reduces the error that this would give when using fast
recovery time diodes. The use of a slow diode is a requirement
in Clampless designs.
The area of the primary loop that connects the input filter
capacitor, transformer primary and LinkSwitch-LP together
should be kept as small as possible.
Primary Clamp Circuit
Lin k S w it c h -LP Layout Considerations
An external clamp may be used to limit peak voltage on the
DRAIN pin at turn off. This can be achieved by using an RCD
clamp or a Zener (~200 V) and diode clamp across the primary
winding. In all cases, to minimize EMI, care should be taken
to minimize the circuit path from the clamp components to the
transformer and LinkSwitch-LP.
Layout
See Figure 6 for a recommended circuit board layout for
LinkSwitch-LP.
Single Point Grounding
Use a single point ground connection from the input filter
capacitor to the area of copper connected to the SOURCE
pins.
Thermal Considerations
The copper area underneath the LinkSwitch-LP acts not only as
a single point ground, but also as a heatsink. As it is connected
to the quiet source node, this area should be maximized for
good heat sinking of LinkSwitch-LP. The same applies to the
cathode of the output diode.
Bypass Capacitor (CBP)
TheBYPASSpincapacitorshouldbelocatedasnearaspossible
to the BYPASS and SOURCE pins.
F
10/05
6
POWERINT [ Power Integrations ]
