Linear Photodiode Array
Imagers
Table 4. Operating Voltages
Signal
Function
State
Voltage
Tolerance
ø1 , ø2
Horizontal Clocks
High
Low
5
0
5ꢀ
Output Amplifier (cont.)
øTG
øPG
øAB
Transfer Gate
Photo Gate
High
Low
8
0
10ꢀ
5ꢀ
condition is not satisfied. Figure 4
details the clock waveform require-
ments and overlap tolerances.
High
Low
8
-4
The video amplifier buffers the signal
from the integrator for output from the
imager. Care must be taken to keep the
load on this amplifier within its ability
to drive highly reactive or low imped-
ance loads. The half power bandwidth
into an external load of 10 pF is
150 MHz. It is recommended that the
output video signal be buffered with a
wide bandwidth emitter follower or
other appropriate amplifier to provide
a large ZIN to the output amplifier.
Keep the external amplifier close to
the output pins to minimize stray
inductive and capacitive coupling of
the output signal that can harm
Antiblooming Gate
High
Low
4
-4
5ꢀ
VOG
øRG
Output Gate
Reset Gate
3
5ꢀ
High
Low
8
0
10ꢀ
VDD
VRD
Amplifier Voltage Supply
Amplifier Reset Drain
12
9.5
0
5ꢀ
5ꢀ
VRD/LS
Amplifier Return / Light Shield
signal quality.
Table 5. Absolute Maximum Rating Above Which Useful Life May Be Impaired
Min
Max
Units
Exposure Control and
Antiblooming
Teemperature
Storage
-25
-25
+85
+55
°C
°C
An exposure control feature in the
P-series imagers supports variable
charge accumulation time in the photo-
diode. When the antiblooming gate
voltage (øAB) is set to its high state,
charge is drained from the pixel
storage gate to the exposure control
drain. During normal charge collection
in the photodiode, øAB is set to its low
state. Due to the timing requirements
of the exposure control mode, charge
is always accumulated at the end of
the period just before the charge is
transferred to the readout register.
Figure 3 includes the timing require-
ments for exposure control with the
antiblooming gate. The exposure
control timing shown will act on the
charge packets that emerge as video
data on the next readout cycle.
Operating
Voltage (with respect to GND)
Pins 3, 4, 17 - 19
Pins 2, 10, 20
-0.3
-0.3
-0.3
-4.3
+18
+18
+ 0
V
V
V
V
Pins 1, 11
Pins 15, 16
+18
Precautionary Note: The CCD output pin (Pin #2) must never be shorted to either VSS or VDD while power is
applied to the device. Catastrophic device failure will result!
Imager Performance
a clean, robust signal for use in
image processing electronics. While
the actual performance of these
imagers depends strongly on the
details of the electronics and timing
the camera provides, their straight-
forward implementation require-
ments facilitate optimum designs.
In P-series images each element per-
forms its own function admirably
while integrating smoothly with the
other elements on the team. The pho-
todiodes efficiently transform light
to charge, the readout registers accu-
rately transport the charge to the
amplifier, and the amplifier delivers
w w w . p e r k in e lm e r . c o m / o p t o
DSP-101 01H - 7/2002W Page 5
PERKINELMER [ PERKINELMER OPTOELECTRONICS ]
