OXmPCI952
OXFORD SEMICONDUCTOR LTD.
2.2 Pin Descriptions
For the actual pinouts of the OXmPCI952 device for this package type, please refer to section 2.1 Pinouts.
PCI / mini-PCI Interface
Mode 0, Mode 1
Dir1
Name
Description
139, 140, 141, 143, 144,
P_I/O
AD[31:0]
Multiplexed PCI Address/Data bus
145, 147, 148, 151, 152,
155, 156, 157, 160, 1, 2,
14, 15, 18, 19, 20, 23, 24,
26, 28, 29, 32, 33, 34, 36,
37, 38
149, 3, 13, 27
P_I
P_I
P_I
P_O
P_I
C/BE[3:0]#
CLK
FRAME#
DEVSEL#
IRDY#
PCI Command/Byte enable
PCI system clock
Cycle Frame
Device Select
Initiator ready
137
4
7
5
6
9
P_O
P_O
P_I/O
P_O
P_I/O
P_I
TRDY#
STOP#
PAR
SERR#
PERR#
IDSEL
RST#
INTA#
INTB#
CLKRUN#
Target ready
Target Stop request
Parity
System error
Parity error
Initialisation device select
PCI system reset
Default PCI Interrupt Line. For Function 0 and Function 1
Optional PCI interrupt Line (PCI Mode)
ClockRun# Line
12
11
10
150
135
133
134
134
138
P_I
P_OD
P_OD
P_I/O
P_OD
(mini-PCI mode)
PME#
Power management event
Serial port pins
Mode 0, Mode 1
46
Dir1
Name
FIFOSEL
Description
I
FIFO select. For backward compatibility with 16C550,
16C650 and 16C750 devices the UARTs’ FIFO depth is 16
when FIFOSEL is low. The FIFO size is increased to 128
when FIFOSEL is high. The unlatched state of this pin is
readable by software. The FIFO size may also be set to 128
by setting FCR[5] when LCR[7] is set, or by putting the
device into enhanced mode.
55, 54
68, 47
66, 49
O(h) SOUT[1:0]
IrDA_Out[1:0]
UART serial data outputs
UART IrDA data output when MCR[6] of the corresponding
channel is set in enhanced mode
UART serial data inputs
I(h)
I(h)
I(h)
SIN[1:0]
IrDA_In[1:0]
DCD[1:0]#
UART IrDA data input when IrDA mode is enabled (see
above)
Active-low modem data-carrier-detect input
DS-0020 Jun 05
Page 10