OXFORD SEMICONDUCTOR LTD.
OXCB950
capabilities for Power Management and supporting the power states D0, D2 and D3. This achieves significant power savings by
allowing device drivers to power down the cardbus/PCI function and disable the UART channel.
A ‘wake-up’ event (the ‘power management event’) is requested via the PME# (PCI) or CSYSCHG (cardbus) pins from either of
the power states D2 or D3, by the UART line RI (for power state D3), and any modem line and the Serial Data In (for power state
D2).
Optional EEPROM:
The OXCB950 can be reconfigured from an external Microwire
TM
based EEPROM. However, this is not required in many
applications as default values are provided for typical applications. Features available via the use of the EEPROM include
redefining device ID’s and vendor/sub-vendor ID fields in the PCI header space, cardbus-to-pci mode change, redefining Tuple
Information (relevant to cardbus applications only), and selectively enabling/disabling interrupts, powerdown and wakeup
requests.
2
B
LOCK
D
IAGRAM
AD[31:0]
C/BE[3:0]
CLK
FRAME#
DEVSEL#
IRDY#
TRDY#
SOUT
SIN
RTS
Internal Data/Control Bus
STOP#
PAR
SERR#
PERR#
RST#
IDSEL
INTA#
PCI
3.3V or
CardBus
Interface
Function 0
UART
DTR
CTS
DSR
DCD
RI
PME#
SLEW_RATE
XTALO
Interrupt logic
Clock &
Baud rate
Generator
MIO pins
MIO[1:0]
XTALI
EE_DO
EE_DI
EE_CK
EE_CS
EEPROM
interface
DS-0033 Sep 05
External-Free Release
Page 6