OX16PCI954
OXFORD SEMICONDUCTOR LTD.
Power management:
Subsystem ID and Subsystem Vendor ID can be set via
input pins.
OX16PCI954 complies with PCI Power Management
Specification 1.0 and PC98/99 Power Management
specifications. Both functions offer the extended
capabilities for Power Management. This achieves
significant power saving by enabling device drivers to
power down the PCI function and the channel clock (in
power state D3). Wake-up is requested via PME# from RI
in power-state D3 or any modem line and SIN in power-
state D2.
Multi-function device:
OX16PCI954 is a multi-function device to enable users to
load individual device drivers for internal serial ports, the
internal parallel port and peripheral devices connected to
the Local Bus.
Quad Internal OX16C950 UARTs
OX16PCI954 contains four ultra-high performance UARTs,
which can increase driver efficiency using features such as
128-byte deep transmitter & receiver FIFOs, data rates up
to 60Mbps, flexible clock options, automatic flow control,
programmable interrupt and flow control trigger levels and
readable FIFO levels.
Optional EEPROM:
OX16PCI954 can be reconfigured from an external
EEPROM. However, this is not required in many
applications as default values are provided for typical
applications up to 8 serial ports, and in some cases the
2 BLOCK DIAGRAM
MODE[1:0]
Config.
SOUT[3:0]
SIN[3:0]
interface
FIFOSEL
RTS[3:0]#
Function
0
Quad
UARTs
DTR[3:0]#
CTS[3:0]#
DSR[3:0]#
DCD[3:0]#
RI[3:0]#
AD[31:0]
C/BE[3:0]#
CLK
FRAME#
DEVSEL#
IRDY#
Interrupt
logic
MIO pins
MIO[11:0]
PD[7:0]
TRDY#
PCI
interface
STOP#
PAR
SERR#
PERR#
IDSEL
RST#
ACK#
PE
BUSY
SLCT
ERR#
SLIN#
INIT#
AFD#
STB#
INTA#
INTB#
PME#
Parallel
port
Function
1
XTALO
Clock &
Baud rate
generator
XTALI
UART_Ck_Out
LBCLK
LBA[7:0]
LBD[7:0]
LBCS[3:0]
EE_DO
EE_DI
Local
Bus
EEPROM
interface
LBWR#
LBRD#
LBRST
EE_CK
EE_CS
Figure 1: OX16PCI954 Block Diagram
DS-0029 Jul 05
External—Free Release
Page 7