OX16PCI954
OXFORD SEMICONDUCTOR LTD.
3 PIN INFORMATION
Mode ‘00’: Quad UARTs + 8-bit local bus
Mode ‘01’: Quad UARTs + parallel port
LBA0
LBRST
LBRST#
MIO7
MIO6
MIO5
MIO4
MIO3
MIO2
MIO1
MIO0
INTA#
INTB#
RST#
GND
PE
ACK#
NC
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SOUT3
SOUT2
RTS2#
DTR2#
CTS2#
DSR2#
DCD2#
RI2#
VDD
UART_Ck_Out
GND
SIN2
SIN1
RI1#
DCD1#
VDD
XTLO
XTLI
GND
DSR1#
CTS1#
DTR1#
RTS1#
VDD
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SOUT3
SOUT2
RTS2#
DTR2#
CTS2#
DSR2#
DCD2#
RI2#
VDD
NC
GND
SIN2
SIN1
RI1#
DCD1#
VDD
XTLO
XTLI
GND
DSR1#
CTS1#
DTR1#
RTS1#
VDD
MIO7
MIO6
MIO5
MIO4
MIO3
MIO2
MIO1
NC
INTA#
INTB#
RST#
GND
CLK
VDD
CLK
VDD
PME#
AD31
AD30
AD29
GND
AD28
AD27
AD26
GND
PME#
AD31
AD30
AD29
GND
AD28
AD27
AD26
GND
GND
GND
OX16PCI954-TQC60-A
OX16PCI954-TQC60-A
SOUT1
SOUT0
RTS0#
DTR0#
CTS0#
DSR0#
DCD0#
RI0#
SOUT1
SOUT0
RTS0#
DTR0#
CTS0#
DSR0#
DCD0#
RI0#
VDD
VDD
AD25
AD24
C/BE3#
IDSEL
AD23
GND
AD22
AD21
AD20
VDD
AD25
AD24
C/BE3#
IDSEL
AD23
GND
AD22
AD21
AD20
VDD
SIN0
SIN0
FIFOSEL
Mode0
Mode1
TEST
EE_DI
EE_CK
FIFOSEL
Mode0
Mode1
TEST
EE_DI
EE_CK
GND
AD19
AD18
GND
AD19
AD18
Mode ’10’: Quad UARTs + pin-assignable
Subsystem ID & Subsystem Vendor ID
Mode ‘11’: 32-bit bridge
LBA0
LBRST
LBRST#
MIO7
MIO6
MIO5
MIO4
MIO3
MIO2
MIO1
MIO0
INTA#
INTB#
RST#
GND
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
LBD15
LBA8
LBA9
LBA10
LBA11
NC
NC
NC
VDD
NC
GND
NC
LBD16
LBD17
LBD18
VDD
NC
GND
GND
Sub_V_ID0
NC
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SOUT3
SOUT2
RTS2#
DTR2#
CTS2#
DSR2#
DCD2#
RI2#
VDD
NC
GND
SIN2
SIN1
RI1#
DCD1#
VDD
XTLO
XTLI
GND
DSR1#
CTS1#
DTR1#
RTS1#
VDD
NC
Sub_ID7
Sub_ID6
Sub_ID5
Sub_ID4
Sub_ID3
Sub_ID2
Sub_ID1
Sub_ID0
INTA#
INTB#
RST#
GND
CLK
VDD
PME#
AD31
AD30
AD29
GND
AD28
AD27
AD26
GND
VDD
AD25
AD24
C/BE3#
IDSEL
AD23
GND
AD22
AD21
AD20
VDD
GND
AD19
AD18
CLK
VDD
PME#
AD31
AD30
AD29
GND
AD28
AD27
AD26
GND
LBD19
LBD20
LBD21
LBD22
VDD
GND
GND
OX16PCI954-TQC60-A
LBD23
LBD24
LBD25
LBD26
LBD27
LBD28
LBD29
LBD30
LBD31
FIFOSEL
Mode0
Mode1
TEST
EE_DI
EE_CK
OX16PCI954-TQC60-A
SOUT1
SOUT0
RTS0#
DTR0#
CTS0#
DSR0#
DCD0#
RI0#
VDD
AD25
AD24
C/BE3#
IDSEL
AD23
GND
AD22
AD21
AD20
VDD
SIN0
FIFOSEL
Mode0
Mode1
TEST
EE_DI
EE_CK
GND
AD19
AD18
Figure 2: Pinout in all configurable modes (package = 160 TQFP)
DS-0029 Jul 05
External—Free Release
Page 8