Figure 7. 16-digit parallel I/O system
Vcc
GND
0-6
Port A
7
0
1
Control
8080
µP
System
Data
Port B
2
3
4
5
6
7
0
1
2
Port C
3
4
5
6
7
8255
WR
A
0
A
1
A
2
A
3
A
B 7442
C
D
3
2
1
0
D0–D6
CU
CLR
CUE
BL
5/
Display
Display
Display
Display
D15
D12 D11
D8 D7
D4 D3
D0
CE1
WR
CE2
CE1
WR
CE2
CE1
WR
CE2
CE1
WR
CE2
Figure 8. Mapped interface.
Re s et
In t
Ho ld
W ait
O ptio n a l
Bu ffers
Address
8980
Z80
6502
Da ta
Address
Figure 7 illustrates a 16 character display with an 8080 system
using the 8255 programmable peripheral interface I/O device.
The following program will display a simple 16 character mes-
sage using this interface.
I/O or Memory Mapped Addressing
Some designers may wish to avoid the additional cost of a par-
allel I/O in their system. Structuring the addressing architecture
for the 3416 to look like a set of peripheral or output devices
(I/O mapped) or RAM’s and ROM’s (memory mapped) is very
easy. Figure 8 shows the simplicity of interfacing to micropro-
cessors, such as 8080, Z80 and 6502 as examples.
The interface with the 6800 microprocessor in Figure 9 illus-
trates the need for designers to check the timing requirements
of the 3416 and the µP. The typical data output hold time is only
30 ns for DBE=∅2 timing; two inverters in the DBE line are
added to increase the data output hold time for compatibility
with the 50 nS minimum specification of the 3416.
Conclusion
Data
OSC
Control
WR
Dis play D is p lay D is p la y Dis p la y
D15
D0 Data 0-6
A
0
A
1
A
2
Decoder A
3
Dis play
Select
CUE
CLR
BL
Parallel
I/0 Device
Data
Control
Figure 9. Interface with 6800 microprocessor
Reset
NMI
Halt
IRQ
TSC
Data
6800 Address
0
1
0
2
DBE
Data
Address
Note that although other manufacturers’ products are used in
examples, this application note does not imply specific
endorsement, or recommendation or warranty of other manu-
facturer’s products by Infineon / OSRAM.
The interface schemes shown demonstrate the simplicity of
using the 3416 with microprocessors. The slight differences
encountered with various microprocessors to interface with the
3416 are similar to those encountered when using different
RAMs. The techniques used in the examples were shown for
their generality, and any display of this family are interchange-
able in these examples. The user will undoubtedly invent other
schemes to optimize his particular system to its requirements.
H
1
H
2
Clock
Driver
BA
VMA
R/W
Decoder
Display
D15
Display
Display
Display
D0
W
CE CE
A
0 –
A
1
D
0 –
D
7
6820
PIA
CUE
BL
CLR
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
Appnote 17
5
May 31, 2000-12
OSRAM [ OSRAM GMBH ]
