FS6182
VCXO Clock Generator IC
Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DI = Input with Internal Pull-Up; DI
D
= Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
U
PIN
1
2
3
4
5
6
7
8
TYPE
DO
P
AI
AO
DO
DO
P
AI
NAME
CLKA
GND
XIN
XOUT
CLKB
CLKC
VDD
XTUNE
Clock Output A
Ground
VCXO Feedback
VCXO Drive
Clock Output B
Clock Output C
Power Supply (+3.3V)
VCXO Tune
DESCRIPTION
3.0
3.1
Functional Block Description
Phase-Locked Loop (PLL)
The on-chip PLLs are a standard frequency- and phase-
locked loop architecture. The PLL multiplies the reference
oscillator to the desired frequency by a ratio of integers.
The frequency multiplication is exact with a zero synthe-
sis error.
the oscillator circuit. The actual amount that changing the
load capacitance alters the oscillator frequency will be
dependent on the characteristics of the crystal as well as
the oscillator circuit itself.
Specifically, the motional capacitance of the crystal (usu-
ally referred to by crystal manufacturers as C
1
), the static
capacitance of the crystal (C
0
), and the load capacitance
(C
L
) of the oscillator determine the warping capability of
the crystal in the oscillator circuit.
A simple formula to obtain the warping capability of a
crystal oscillator is:
6
C
1
×
(
C
L
2
−
C
L
1
)
×
10
∆
f
(
ppm
)
=
2
×
(
C
0
+
C
L
2
)
×
(
C
0
+
C
L
1
)
3.2
Voltage-Controlled Crystal
Oscillator (VCXO)
The VCXO provides a tunable, low-jitter frequency refer-
ence for the rest of the FS6182 system components.
Loading capacitance for the crystal is internal to the
FS6182. No external components (other than the reso-
nator itself) are required for operation of the VCXO.
Continuous fine-tuning of the VCXO frequency is accom-
plished by varying the voltage on the XTUNE pin. The
total change (from one extreme to the other) in effective
loading capacitance is from 13pF to 35pF.
The oscillator operates the crystal resonator in the paral-
lel-resonant mode. Crystal warping, or the “pulling” of the
crystal oscillation frequency, is accomplished by altering
the effective load capacitance presented to the crystal by
where C
L1
and C
L2
are the two extremes of the applied
load capacitance.
EXAMPLE: A crystal with the following parameters is
used. With C
1
= 0.02pF, C
0
= 5pF, C
L1
= 13pF, and C
L2
=
35pF, the coarse tuning range (peak-to-peak) is:
0
.
02
×
(
35
−
13
)
×
106
∆
f
=
=
305
ppm
.
2
×
(
5
+
35
)
×
(
5
+
13
)
2
ISO9001
2.27.02
ONSEMI [ ON SEMICONDUCTOR ]
