FS6131-01/FS6131-01g Programmable Line Lock Clock Generator IC
Data Sheet
4.3 Loop Gain Analysis
For applications where an external loop filter is required, the following analysis example can be used to determine loop gain and
stability.
The loop gain of a PLL is the product of all of the gains within the loop.
The transfer function of the phase detector and charge pump combination is (in A/rad):
Ichgpump
KPD
=
2π
The transfer function of the loop filter is (in V/A):
1
KLF (s) =
⎛
⎜
⎞
⎟
1
⎜
⎟
sC2 +
⎜
⎜
⎝
⎟
⎟
⎠
⎛
⎝
⎞
⎟
⎠
1
R
+
⎜
LF
sC1
The VCO transfer function (in rad/s, and accounting for the phase integration that occurs in the VCO) is:
1
K
VCO (s) = 2πAVCO
s
The transfer function of the feedback divider is:
1
KF =
NF
Finally, the sampling effect that occurs in the phase detector is accounted for by:
⎛
⎜
⎝
⎞
s
−
⎛
⎞
⎟
fREF ⎠
⎜
⎟
1− e
KSAMP (s) =
f
REF
⎜
⎟
s
⎜
⎝
⎟
⎠
The loop gain of the PLL is:
KLOOP (s) = KPD KLF (s)KVCO (s)KF KSAMP (s)
AMI Semiconductor – Rev. 3.0, Jan. 08
7
www.amis.com
Specifications subject to change without notice
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