FEDL7050LA-02
1
Oki Semiconductor
ML7050LA
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.0V, Ta = 0 to +55°C)
Symbol
Vih
Vil
Voh
Vol
Clock
MCLK
Master clock frequency
Ta=25°C
-
-
TX and RX disabled
V
DD
applied and power
control pins disabled
-
-
55
34
22
10
-
-
-
-
mA
mA
mA
uA
-
12.13,
16
Current Consumption
IDDO
Receive Mode
Transmit Mode
PLL Mode
IDDS
Receiver
F
RF
R
IN
-
-
-
Z
IN
Transmitter
f
RF
P
O
—
f
stab1
f
stab2
f
stab3
RF Frequency
RF Output power
Carrier frequency tolerance
Frequency drift
(1 slot packet)
Frequency drift
(3 slot packet)
Frequency drift
(5 slot packet)
Maximum frequency drift
rate
—
—
—
Power stability
Modulation index
±500 kHz
In-band spurious level
Offset = 2 MHz
Offset > 3 MHz
over temp
0.28
f
RF
= 2.4 to 2.5 GHz,
Description
Digital input high
Digital input low
Digital output high
Digital output low
Conditions
Min.
2.4
-0.3
Typ.
Max.
V
DD
+0.3
0.4
3.6
0.8
-
Unit
V
V
V
V
MHz
Digital Inputs
Digital Outputs
Ioh=-2mA
Iol=2mA
2.2
0
Standby Mode
RF Frequency
Reception sensitivity
Maximum Received Signal
Spurious level
Input VSWR
RF Input impedance
SW in
30 MHz to 1 GHz
1 GHz to 12.75 GHz
Includes ANT BPF loss,
Note 1
2.4
–75
–20
2.5
GHz
dBm
dBm
–57
–47
-
2:1
50
2.4
0
-75
-25
-40
-40
2
2.5
4
75
25
40
40
400
TBD
0.35
–20
–20
–40
-
dBm
dBm
Ω
GHz
dBm
KHz
KHz
KHz
KHz
Hz/µs
dBm
-
dBm
dBm
dBm
initial accuracy (static)
3/16
OKI [ OKI ELECTRONIC COMPONETS ]
