FEDL7050LA-02
1
Oki Semiconductor
ML7050LA
PIN CONNECTION DIAGRAM
Tune_C
10 nF
3 kΩ
1 nF
33 nF
33 nF
Limiting
AMP
33 nF
LPF_C
0.1
µF
DEMOD
RXD
Lim_C1
Lim_C2
LNA
IRM
IF BPF
Gm-C
Tuning
BPF
RF_Ant
GND
0.1
µF
for
each
V
dd
_PA
V
dd
_VCO
V
dd
_PLL
V
dd
_LNA
V
dd
_IRM_LO
V
dd
_IRM
GND
SW
(for Ant)
PLL
Loop Filter
Gaussian
Filter
(SW Control)
TX_POW
RX_POW
PLL_POW
PLL_CLK
PLL_DATA
PLL_LE
PLL_OFF
TXD
PA
SW
(for Local)
AMP
VCO
0.1
µF
100 pF
33kΩ
470pF
V
dd
_IF
PLL_LF2
66kΩ
47pF
NM
MCLK
0.1µF
100 pF
Vdd_D
GND_D
~
13MHz
PLL_LF1
12MHz,
or 16MHz
The externally connected components shown are tentative (April 2001).
* The circuit is subject to change according to the specific board design.
Please contact Oki Electric Industry Co., Ltd. for detailed information.
The ML7050LA provides a low bill-of-material (BOM) Bluetooth solution by minimizing external components. The
design incorporates numerous internal tuning circuits using Gm-C and other leading-edge technologies to reliably
control phase lock loop (PLL), VCO, amplifiers, modulator, and demodulator circuits. The TX-POW, RX_POW,
PLL_POW, PLL-CLK, PLL_DATA, PLL_LE, PLL_OFF, RXD, and TXD connect directly to the complementary
Bluetooth baseband (ML70511LA) device.
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