FEDL63295A-02
1Semiconductor
ML63295A
BLOCK DIAGRAM
Asterisks (*) indicate the port secondary functions. Signal names enclosed by chain lines (
) indicate interface
signals of the VDDI power supply system. Signal names enclosed by
supply system.
indicates signals of the VDDE power
CPU core
CBR
nX-4/250
H
X
L
RA
PC
TIMING
CONT.
ROM
32 KW
EBR
Y
A
G
SP
C
Z
BUS
CONT.
ALU
D0-7*
EXTMEM
64 KB
RSP
MIE
A0-15*
INSTRUCTION
DECODER
STACK
CAL.S:16-level
REG.S:16-level
IR
R D *
W R *
INT
T2CK*
T3CK*
2
RAM
2048N
TIMER
8 bit (2ch)
INT
2
RXC*
TXC*
RXD*
TXD*
INT
SIO
INT
1
MULDIV
TBC
SCLK*
SIN*
RESET
RST
SFT
SOUT*
INT
4
INT
1
TST1
TST2
MD
TST
MELODY
MDB
INT
1
P0.0-P0.3
P1.0-P1.3
BLD
INPUT
PORT
XT0
XT1
OSC
OSC0
INT
1
P2.0-P2.3
P3.0-P3.3
P4.0-P4.3
P5.0-P5.3
P6.0-P6.3
P7.0-P7.3
100HzTC
W DT
OSC1
INT
1
OUTPUT
VDDX1
VDDX2
VDDX3
VDDX4
C1
INT
4
P8.0-P8.3
P9.0-P9.3
PA.0-PA.3
PB.0-PB.3
PC.0-PC.3
PE.0-PE.3
C2
BIAS
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
I/O
PORT
LCD
&
DSPR
COM1-COM32
SEG0-SEG95
VDD
VDDL
VDDE
VR
VDDI
VSS
4/38
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