FEDL63193-04
1Semiconductor
ML63193
PIN DESCRIPTIONS
The basic functions of each pin of the ML63193 are described in Table 1.
A symbol with a slash “/” denotes a pin that has a secondary function. Refer to Table 2 for secondary functions.
For type, “—” denotes a power supply pin, “I” an input pin, “O” an output pin, and “I/O” an input-output pin.
Table 1 Pin Descriptions (Basic Functions)
Function
Symbol
VDD
Pin No. Pad No. Type
Description
Positive power supply pin
50
39,91
40
76
65,112
66
—
—
VSS
Negative power supply pin
Power supply pins for LCD bias (internally
generated):
VDD1
VDD2
VDD3
VDD4
VDD5
41
67
Capacitors (0.1 µF) should be connected between
these pins and VSS.
42
68
—
43
69
44
70
Capacitor connection pins for LCD bias generation:
A capacitor (0.1 µF) should be connected between
C1 and C2.
C1
C2
45
46
71
72
—
—
Positive power supply pin for external interface
(Power supply for input, and input-output
ports)
Power
Supply
VDDI
61
51
87
77
Positive power supply pin for internal logic
(internally generated):
A capacitor (0.1 µF) should be connected between
this pin and VSS.
VDDL
—
Voltage multiplier pin for power supply backup
(internally generated):
A capacitor (1.0 µF) should be connected between
this pin and VSS.
VDDH
47
73
—
—
Pins to connect a capacitor for voltage multiplier.
CB1
CB2
48
49
74
75
A capacitor (1.0 µF) should be connected between
CB1 and CB2.
Low-speed clock oscillation pins:
An option for using crystal oscillation or RC
oscillation is chosen by the mask option.
If the crystal oscillation is chosen, a crystal should
be connected between XT0 and XT1, and capacitor
(CG) should be connected between XT0 and VSS.
If the RC oscillation is chosen, external oscillation
resistor (ROSL) should be connected between XT0
and XT1.
XT0
XT1
56
55
82
81
I
Oscillation
O
High-speed clock oscillation pins:
OSC0
OSC1
53
52
79
78
I
A ceramic resonator and capacitors (CL0, CL1) or
external oscillation resistor (ROSH) should be
connected to these pins.
O
10/37