¡ Semiconductor
3.3 External SRAM Interface
Signal Name Type
ra [16:0]
rd [7:0]
rren
rwen
rcen
O
B
O
O
O
Pin Count
17
8
1
1
1
Total 28 pins
Data bus for external SRAM
Read enable signal for external SRAM
Write enable signal for external SRAM
Chip enable signal for external SRAM
Description
Address bus for external SRAM
ML54051
3.4 Extended Bus Interface
The extended bus interface is a signal line for the ML54051’s internal microcontroller. The
extended bus interface is used for purposes such as debugging.
Signal Name Type
xah [15:8]
xad [7:0]
xrd
xwr
xale
xpsen
xint
xrst
xclk
B
B
B
B
B
I
O
O
O
Pin Count
8
8
1
1
1
(1)
(1)
(1)
(1)
Total 19 pins
Address bus for extended bus
Address/data bus for extended bus
Read signal for extended bus
Write signal for extended bus
Address latch enable signal for extended bus
Program store enable signal for extended bus
Interrupt signal for extended bus
Reset signal for extended bus
Clock signal for extended bus
Description
*
In an external ROM connection mode, xah, xad, xrd, xwr, and xale are used to connect to
external ROM.
3.5 Other Interfaces
Signal Name Type
txd/pcfg [0]
rxd/pcfg [1]
porn
xin
xout
B
I
I
I
O
Pin Count
1
1
1
1
1
Total 5 pins
Power-on-reset signal (connect to power monitor circuit)
Clock I/O (connect a crystal oscillator between xin and xout)
Description
Serial data I/O and chip mode setting
*
The chip mode is determined depending upon the status of pcfg[1:0] when the porn signal
rises.
pcfg[1:0] = 11 : Normal mode
pcfg[1:0] = 01 : External CPU connection mode
pcfg[1:0] = 10 : External ROM connection mode
pcfg[1:0] = 00 : Test mode (normally not used)
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