FEDL2302DIGEST-05
OKI Semiconductor
ML2302
Pin
(WCSP)
J3
J4
J7
H7
E9
E8
B3
A4
C4
B4
A3
A5
H6
H8, B2
E3, G8
D7, G5
A2, B8
C5, A8
C9, D8
C8
D9
A6
B6
C6
D1, D2,
D3, C1,
C2, B1,
B5
Pin
(TQFP)
61
58
51
50
40
39
18
22
20
21
19
25
52
49, 16
9, 46
38, 57
17, 33
23, 32
36
35
34
37
26
27
28
10~15
,24
Symbol
SIOCK
VCK
XT
XT
RESET
FIFOST
SG
MIN
LIN
MOUT
LOUT
AOUT
VOXO
TEST0, 8
DV
DD
DGND
AV
DD
AGND
CB1
CB2
SPV
DD
VR
SPIN
SPOUT–
SPOUT+
TEST2 to
7, 9
Type
I/O
I/O
I
O
I
I
O
I
O
O
O
I
—
—
—
—
O
O
O
I
O
O
Description
16-bit serial data transfer clock when external A/D or D/A
converter is used.
Outputs sampling frequency selected. Input pin when slave
mode is selected.
Oscillator connection pins. when external clock is used, input
clock into XT pin and leave
XT
pin open. Oscillation stops
during reset or power down mode. Figure (a) shows Oscillation
Equivalent Circuit.
When this pin is “L”, the LSI is initialized and AOUT is set to the
GND level.
When this pin is “L”, EMP, MID, and FULL of playback FIFO can
be monitored. When this pin is “H”, EMP, MID, and FULL of
record FIFO can be monitored.
Analog circuit signal ground pin. This pin is connected to GND
during reset or power down mode.
Inverting input pin for built-in OP amplifier. Non-inverting input
pin is connected to SG (Signal Ground).
MOUT is the output of internal OP amplifier to MIN, and LOUT
is to LIN.
This is the output of the analog playback waveform.
Voice level detection signal
Pins for testing. Set the pins to “L”.
Digital power supply pin. Insert a minimum 0.1
µF
bypass
capacitor between this pin and DGND pin
Digital GND pin.
Analog power supply pin. Insert a minimum 0.1
µF
bypass
capacitor between this pin and AGND pin.
Analog GND pin.
This pin is used to connect a capacitor for voltage multiplier
power supply. Insert a 1
µF
capacitor between CB1 and CB2.
Voltage multiplier power supply output pin for speaker amplifier.
Connect a 1
µF
capacitor to this pin in order to stabilize the
speaker amplifier circuit.
Bias output pin for speaker amplifier. Set this pin to the GND
level during reset or power down mode.
Voice signal input pin for speaker amplifier.
Speaker amplifier output pin. This pin outputs a signal in
reverse phase to the signal that is input to the SPIN pin.
Speaker amplifier output pin. This pin outputs a signal in phase
to the signal that is input to the SPIN pin.
Pins for testing. Leave these pins open.
O
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