FEDD56V62160E-01
OKI Semiconductor
MD56V62160E
PIN CONFIGURATION (TOP VIEW)
VCC
1
54 VSS
DQ1 2
VCCQ 3
DQ2 4
DQ3 5
VSSQ 6
DQ4 7
DQ5 8
VCCQ 9
DQ6 10
DQ7 11
VSSQ 12
DQ8 13
53 DQ16
52 VSSQ
51 DQ15
50 DQ14
49 VCC
Q
48 DQ13
47 DQ12
46 VSSQ
45 DQ11
44 DQ10
43 VCC
Q
42 DQ9
41 VSS
40 NC
39 UDQM
38 CLK
37 CKE
36 NC
35 A11
34 A9
V
CC 14
LDQM 15
16
WE
CAS
RAS
CS
17
18
19
A13 20
A12 21
A10 22
A0 23
A1 24
A2 25
A3 26
33 A8
32 A7
31 A6
30 A5
29 A4
V
CC 27
28 VSS
54-Pin Plastic TSOP(II)
(K Type)
Pin Name
CLK
Function
System Clock
Pin Name
UDQM, LDQM
DQi
Function
Data Input/ Output Mask
Data Input/ Output
CS
Chip Select
CKE
Clock Enable
VCC
Power Supply (3.3 V)
Ground (0 V)
A0–A10
A11
Address
VSS
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
VCC
VSS
NC
Q
Data Output Power Supply (3.3 V)
Data Output Ground (0 V)
No Connection
RAS
Q
CAS
WE
Note : The same power supply voltage must be provided to every VCC pin and VCCQ pin.
The same GND voltage level must be provided to every VSS pin and VSSQ pin.
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