MP7652
PIN CONFIGURATIONS
1
1
24
23
22
21
20
19
18
17
16
15
14
13
24
23
22
21
20
19
18
17
16
15
N/C
N/C
N/C
N/C
N/C
PRESET
LD
CLK
SDO
SDI
2
2
N/C
PRESET
LD
CLK
3
V
DD
V
CC
V
EE
3
V
DD
V
CC
V
EE
4
4
5
5
SDO
DGND
6
6
DGND
SDI
V
V
7
REFN1
REFN4
V
7
V
V
V
V
V
V
REFN1
REFN4
8
V
V
V
V
V
V
V
V
V
V
OUT1
REFP1
REFP2
OUT4
8
V
V
V
OUT1
REFP1
REFP2
OUT4
9
REFP4
REFP3
OUT3
9
REFP4
REFP3
10
10
11
12
11
12
14
13
OUT2
V
V
OUT2
OUT3
REFN2
REFN3
REFN2
REFN3
24 Pin PDIP (0.300”)
NN24
24 Pin SOIC (Jedec, 0.300”)
S24
PIN OUT DEFINITIONS
PIN NO.
NAME
DESCRIPTION
No Connection
PIN NO.
NAME
DESCRIPTION
DAC 3 Output
1
N/C
N/C
14
15
16
17
18
19
20
21
22
23
V
V
V
V
V
OUT3
2
No Connection
DAC 3 Positive Reference Input
DAC 4 Positive Reference Input
DAC 4 Output
REFP3
REFP4
OUT4
3
V
DD
V
CC
V
EE
Digital Positive Supply
Analog Positive Supply
Analog Negative Supply
Digital Ground
4
5
DAC 4 Negative Reference Input
Serial Data and Address Input
Serial Data Output
REFN4
6
DGND
SDI
SDO
CLK
LD
7
V
V
V
V
V
V
V
DAC 1 Negative Reference Input
DAC 1 Output
REFN1
OUT1
8
Shift Register Clock Input
Load Data to Selected DAC
9
DAC 1 Positive Reference Input
DAC 2 Positive Reference Input
DAC 2 Output
REFP1
REFP2
OUT2
10
11
12
13
PRESET Preset all DACs to 1/2
(V
– V
). PRESET is
REF
REFN
internally connected to V
DD
through 300 kΩ.
DAC 2 Negative Reference Input
DAC 3 Negative Reference Input
REFN2
REFN3
24
N/C
No Connection
Rev. 1.00
3
EXAR [ EXAR CORPORATION ]
