MP7652
Internal
Address
Inputs
SDI
Output
SDO
PRESET
CLK
X
LD
X
A1
X
A0
X
Operation
0
1
X
X
Preset all DACs to
1/2 (V
+ V
)
REFP
REFN
Data In
0→1
1
X
X
Last bit
of shift reg.
Shift data in and out
1
1
X
X
X
X
0
0→1
0
0
0
0
Hi-Z
Last bit
of shift reg.
DAC 1 Transparent
DAC 1 Latched
1
1
X
X
X
X
0
0→1
0
0
1
1
Hi-Z
Last bit
of shift reg.
DAC 2 Transparent
DAC 2 Latched
1
1
X
X
X
X
0
0→1
1
1
0
0
Hi-Z
Last bit
of shift reg.
DAC 3 Transparent
DAC 3 Latched
1
1
X
X
X
X
0
0→1
1
1
1
1
Hi-Z
Last bit
of shift reg.
DAC 4 Transparent
DAC 4 Latched
Table 1. Digital Function Truth Table
Serial In/Serial Out
DAC Output Voltage
VOUTi = VREFNi + (VREFPi – VREFNi ) (
D7
D6
D5
D4
D3
D2
D1
D0
D
256
)
MSB
LSB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
V
REFN
1
256
(V
REFP
– V
) (
) + V
REFN
REFN
254
256
(V
– V
– V
) (
) + V
) + V
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
REFP
REFN
REFN
255
256
(V
REFP
) (
REFN
REFN
Table 2. DAC Transfer Function
Analog Output vs. Digital Code
Rev. 1.00
8
EXAR [ EXAR CORPORATION ]
