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EM6A9320BI-35 参数 Datasheet PDF下载

EM6A9320BI-35图片预览
型号: EM6A9320BI-35
PDF下载: 下载PDF文件 查看货源
内容描述: 4M ×32 DDR SDRAM [4M x 32 DDR SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 16 页 / 610 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
 浏览型号EM6A9320BI-35的Datasheet PDF文件第2页浏览型号EM6A9320BI-35的Datasheet PDF文件第3页浏览型号EM6A9320BI-35的Datasheet PDF文件第4页浏览型号EM6A9320BI-35的Datasheet PDF文件第5页浏览型号EM6A9320BI-35的Datasheet PDF文件第7页浏览型号EM6A9320BI-35的Datasheet PDF文件第8页浏览型号EM6A9320BI-35的Datasheet PDF文件第9页浏览型号EM6A9320BI-35的Datasheet PDF文件第10页  
Et r on Tech  
EM6A9320  
4Mx32 DDR SDRAM  
Mode Register Set (MRS)  
The mode register is divided into various fields depending on functionality.  
Burst Length Field (A2, A1, A0)  
This field specifies the data length of column access and selects the Burst Length.  
Addressing Mode Select Field (A3)  
The Addressing Mode can be Interleave Mode or Sequential Mode. Both Sequential Mode and  
Interleave Mode support burst length of 2, 4 and 8. Full page burst length is only for Sequential mode.  
CAS# Latency Field (A6, A5, A4)  
This field specifies the number of clock cycles from the assertion of the Read command to the first read  
data. The minimum whole value of CAS# Latency depends on the frequency of CK. The minimum whole  
value satisfying the following formula must be programmed into this field.  
tCAC(min)  
CAS# Latency X tCK  
Test Mode field :A7; DLL Reset Mode field : A8  
These two bits must be programmed to "00" in normal operation.  
( BA0, BA1)  
Mode Resistor Bitmap  
BA1  
0
BA0  
A11  
A10  
A9  
A8  
A7  
TM  
A6  
A5  
A4  
A3  
BT  
A2  
A1  
A0  
Mode RFU must be set to 0DLL  
CAS Latency  
Burst Lenght  
BA0 Register Mode  
A8  
0
1
A7  
0
0
Mode  
Normal  
Reset DLL  
Test Mode  
A3  
0
1
Type  
Sequential  
Interleave  
0
1
MRS  
EMRS  
0
1
A6  
0
0
1
1
A5  
1
1
0
0
A4  
CAS Latency  
Reserved  
3 clocks  
A2  
A1  
0
1
1
1
A0  
1
0
1
1
Burst Length  
0
1
0
1
0
0
0
1
2
4
8
4 clocks  
5 clocks  
Full Page (Sequential)  
All other Reserved  
All other Reserved  
Burst Definition, Addressing Sequence of Sequential and Interleave Mode  
Start Address  
Burst Length  
2
Sequential  
Interleave  
A2  
X
X
X
X
X
X
0
A1  
X
X
0
0
1
A0  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0, 1  
1, 0  
0, 1, 2, 3  
1, 2, 3, 0  
2, 3, 0, 1  
3, 0, 1, 2  
0, 1  
1, 0  
0, 1, 2, 3  
1, 0, 3, 2  
2, 3, 0, 1  
3, 2, 1, 0  
4
1
0
0, 1, 2, 3, 4, 5, 6, 7  
1, 2, 3, 4, 5, 6, 7, 0  
2, 3, 4, 5, 6, 7, 0, 1  
3, 4, 5, 6, 7, 0, 1, 2  
4, 5, 6, 7, 0, 1, 2, 3  
5, 6, 7, 0, 1, 2, 3, 4  
6, 7, 0, 1, 2, 3, 4, 5  
7, 0, 1, 2, 3, 4, 5, 6  
0, 1, 2, 3, 4, 5, 6, 7  
1, 0, 3, 2, 5, 4, 7, 6  
2, 3, 0, 1, 6, 7, 4, 5  
3, 2, 1, 0, 7, 6, 5, 4  
4, 5, 6, 7, 0, 1, 2, 3  
5, 4, 7, 6, 1, 0, 3, 2  
6, 7, 4, 5, 2, 3, 0, 1  
7, 6, 5, 4, 3, 2, 1, 0  
0
0
0
1
0
1
8
1
0
1
0
1
1
1
1
Etron Confidential  
6
Rev 0.3  
July. 2002