Et r on Tech
EM6A9320
4Mx32 DDR SDRAM
VSS
Supply
Ground: Ground
DQ Power:
VDDQ
VSSQ
VREF
NC
Supply
Supply
Supply
-
Provide isolated power to DQs for improved noise immunity.
DQ Ground:
Provide isolated ground to DQs for improved noise immunity.
Reference Voltage for Inputs:
+0.5 x VDDQ
No Connect: These pins should be left unconnected.
Note: The timing reference point for the differential clocking is the cross point of the CK and CK#. For any
applications using the single ended clocking, apply VREF to CK# pin.
Operation Mode
Fully synchronous operations are performed to latch the commands at the positive edges of CK . Table 2 shows
the truth table for the operation commands.
Table 2. Truth Table (Note (1), (2) )
Command
BankActivate
State
Idle(3)
Any
CKEn-1 CKEn DM BA1 BA0 A8 A11-A9, A7-0 CS# RAS# CAS# WE#
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
H
L
X
X
X
V
V
X
X
X
X
X
X
X
X
X
V
V
X
V
V
V
V
L
V
V
X
V
V
V
V
L
Row Address
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
H
L
H
L
X
X
L
L
H
H
H
L
H
L
BankPrecharge
PrechargeAll
L
H
L
X
X
Any
L
L
Write
Active(3)
Active(3)
Active(3)
Active(3)
Idle
H
H
H
H
L
L
Column
Address
A0~A7
Write and AutoPrecharge
Read
H
L
L
L
L
H
H
L
Read and Autoprecharge
Mode Register Set
Extended Mode Register Set
No-Operation
H
L
L
OP code
Idle
L
H
X
X
X
X
X
L
L
L
Any
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
X
H
L
H
X
H
L
H
X
L
Device Deselect
Burst Stop
Any
Active(4)
AutoRefresh
Idle
H
H
X
H
X
H
X
H
X
X
SelfRefresh Entry
Idle
L
L
Idle
(Self Refresh)
X
H
X
H
X
H
X
X
X
H
X
H
X
H
X
X
SelfRefresh Exit
L
H
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Power Down Mode Entry Idle/Active(5)
Any
Power Down Mode Exit
(Power Down)
H
Data Write/Output Enable
Data Mask/Output Disable
Active
Active
H
H
X
X
L
X
X
X
X
X
X
X
X
H
Note: 1. V = Valid data, X = Don't Care, L = Low level, H = High level
2. CKEn signal is input level when commands are provided.
CKEn-1 signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BA0, BA1signals.
4. Read burst stop with BST command for all burst types.
5. Power Down Mode can not enter in the burst operation.
When this command is asserted in the burst cycle, device state is clock suspend mode.
Etron Confidential
5
Rev 0.3
July. 2002
ETRON [ ETRON TECHNOLOGY, INC. ]
