EM6A9160
EtronTech
Mode Register Set (MRS)
The Mode Register stores the data for controlling various operating modes of a DDR SDRAM. It programs
CAS Latency, Burst Type, and Burst Length to make the DDR SDRAM useful for a variety of applications.
The default value of the Mode Register is not defined; therefore the Mode Register must be written by the
user. Values stored in the register will be retained until the register is reprogrammed. The Mode Register is
written by asserting Low on
,
,
,
, BA1 and BA0 (the device should have all banks idle with
CS RAS CAS WE
no bursts in progress prior to writing into the mode register, and CKE should be High). The state of address
pins A0~A11 and BA0, BA1 in the same cycle in which and are asserted Low is written
,
,
CS RAS CAS
WE
into the Mode Register. A minimum of two clock cycles, tMRD, are required to complete the write operation in
the Mode Register. The Mode Register is divided into various fields depending on functionality. The Burst
Length uses A0~A2, Burst Type uses A3, and CAS Latency (read latency from column address) uses A4~A6.
A logic 0 should be programmed to all the undefined addresses to ensure future compatibility. Reserved
states should not be used to avoid unknown device operation or incompatibility with future versions. Refer to
the table for specific codes for various burst lengths, burst types and CAS latencies.
Table 4. Mode Register Bitmap
BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Field
0
0
0
T.M.
CAS Latency
BT
Burst Length
Mode Register
A8 A7 Test Mode
A6 A5 A4 CAS Latency A3 Burst Type A2 A1 A0 Burst Length
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Reserved
2
0
1
X
0
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Reserved
Reserved
2
0 Sequential
Interleave
Normal mode
DLL Reset
Test mode
1
4
3
8
Reserved
Reserved
2.5
Reserved
Reserved
Reserved
Reserved
BA0 Mode
0
1
MRS
EMRS
Reserved
Burst Length Field (A2~A0)
•
This field specifies the data length of column access using the A2~A0 pins and selects the Burst Length to be
2, 4, and 8.
Table 5. Burst Length
A2
0
A1
0
A0
0
Burst Length
Reserved
2
0
0
1
0
1
0
4
0
1
1
8
1
0
0
Reserved
Reserved
Reserved
Reserved
1
0
1
1
1
0
1
1
1
7
Rev. 1.3
Apr. /2014
ETRON [ ETRON TECHNOLOGY, INC. ]
