Et r on Tech
EM658160
4Mx16 DDR SDRAM
Mode Register Set (MRS)
The mode register is divided into various fields depending on functionality.
•
Burst Length Field (A2~A0)
This field specifies the data length of column access using the A2~A0 pins and selects the
Burst Length to be 2, 4, 8.
A2
0
A1
0
A0
0
Burst Length
Reserved
2
0
0
1
0
1
0
4
0
1
1
8
1
0
0
Reserved
Reserved
Reserved
Reserved
1
0
1
1
1
0
1
1
1
•
Addressing Mode Select Field (A3)
The Addressing Mode can be one of two modes, both Interleave Mode or Sequential Mode.
Both Sequential Mode and Interleave Mode support burst length of 2,4 and 8.
A3
0
Addressing Mode
Sequential
1
Interleave
--- Addressing Sequence of Sequential Mode
An internal column address is performed by increasing the address from the column
address which is input to the device. The internal column address is varied by the Burst
Length as shown in the following table.
Data n
0
n
1
2
3
4
5
6
7
n+1
n+2
n+3
n+4
n+5
n+6
n+7
Column Address
2 words
4 words
8 words
Burst Length
Full Page (Even starting address)
--- Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the
address bits in the sequence shown in the following table.
Data n
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Column Address
Burst Length
A7 A6 A5 A4 A3 A2 A1 A0
A7 A6 A5 A4 A3 A2 A1 A0#
A7 A6 A5 A4 A3 A2 A1# A0
A7 A6 A5 A4 A3 A2 A1# A0#
A7 A6 A5 A4 A3 A2# A1 A0
A7 A6 A5 A4 A3 A2# A1 A0#
A7 A6 A5 A4 A3 A2# A1# A0
A7 A6 A5 A4 A3 A2# A1# A0#
4 words
8 words
Etron Confidential
6
Rev. 1.1
Jan. 2002
ETRON [ ETRON TECHNOLOGY, INC. ]
