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EM658160TS-33 参数 Datasheet PDF下载

EM658160TS-33图片预览
型号: EM658160TS-33
PDF下载: 下载PDF文件 查看货源
内容描述: 4M ×16的DDR同步DRAM (SDRAM)的 [4M x 16 DDR Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 26 页 / 158 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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Et r on Tech  
EM658160  
4Mx16 DDR SDRAM  
Operation Mode  
Fully synchronous operations are performed to latch the commands at the positive edges of CK. Table 2  
shows the truth table for the operation commands.  
Table 2. Truth Table (Note (1), (2) )  
Command  
State CKEn-1 CKEn DM BS0,1 A10 A0-9,11 /CS /RAS /CAS /WE  
Idle(3)  
Any  
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
X
X
X
X
X
X
X
X
X
X
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
V
V
X
V
V
V
V
Row address  
L
L
L
L
L
L
L
L
L
L
L
H
L
L
H
L
X
H
L
X
H
L
X
X
L
L
H
H
H
L
H
L
BankActivate  
BankPrecharge  
PrechargeAll  
L
H
L
X
X
Any  
L
L
Active(3)  
Active(3)  
Active(3)  
Active(3)  
Idle  
H
H
H
H
L
L
Write  
Column  
address  
(A0 ~ A7)  
Write and AutoPrecharge  
Read  
H
L
L
L
Column  
address  
(A0 ~ A7)  
L
H
H
L
Read and Autoprecharge  
Mode Register Set  
Extended MRS  
No-Operation  
H
L
OP code  
L
Idle  
OP code  
L
L
L
Any  
Active(4)  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
X
L
H
H
X
L
H
L
Burst Stop  
Device Deselect  
AutoRefresh  
Any  
X
H
H
X
H
X
X
H
X
X
H
X
X
Idle  
SelfRefresh Entry  
SelfRefresh Exit  
Idle  
L
L
Idle  
H
X
H
X
X
H
X
X
H
X
X
X
H
X
X
H
X
X
H
X
X
(SelfRefresh)  
Clock Suspend Mode Entry  
Power Down Mode Entry  
Active  
Any(5)  
H
H
L
L
X
X
X
X
X
X
X
X
Clock Suspend Mode Exit  
Power Down Mode Exit  
Active  
L
L
H
H
X
X
X
X
X
X
X
X
Any  
(PowerDown)  
Data Write/Output Enable  
Data Mask/Output Disable  
Active  
Active  
H
H
X
X
L
X
X
X
X
X
X
H
Note: 1. V=Valid data, X=Don't Care, L=Low level, H=High level  
2. CKEn signal is input level when commands are provided.  
CKEn-1 signal is input level one clock cycle before the commands are provided.  
3. These are states of bank designated by BS signal.  
4. Device state is 1, 2, 4, 8, and full page burst operation.  
5. Power Down Mode can not enter in the burst operation.  
When this command is asserted in the burst cycle, device state is clock suspend mode.  
Etron Confidential  
5
Rev. 1.1  
Jan. 2002