EtronTech
EM638325
2Mega x 32 SDRAM
Operation Mode
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 2 shows the truth table for the operation commands.
Table 2. Truth Table (Note (1), (2) )
Command
State
Idle(3)
Any
CKEn-1 CKEn DQM(6) BS
0,1
A
A
CS# RAS# CAS# WE#
10
9-0
BankActivate
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
V
Row address
L
L
L
L
L
L
L
H
H
H
L
H
L
L
L
L
BankPrecharge
PrechargeAll
V
X
V
V
L
H
L
X
X
Any
L
Active(3)
Active(3)
H
H
Write
Column
address
(A0 ~ A7)
Write and AutoPrecharge
H
L
Active(3)
Active(3)
H
H
X
X
X
X
V
V
L
L
L
H
H
L
L
H
H
Read
Column
address
(A0 ~ A7)
Read and Autoprecharge
H
Mode Register Set
No-Operation
Idle
Any
Active(4)
H
H
H
H
H
H
L
X
X
X
X
H
L
X
X
X
X
X
X
X
OP code
L
L
L
H
H
X
L
L
H
H
X
L
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Burst Stop
L
Device Deselect
AutoRefresh
Any
H
L
X
H
H
X
H
X
X
H
X
X
H
X
X
Idle
SelfRefresh Entry
SelfRefresh Exit
Idle
L
L
L
Idle
(SelfRefresh)
H
H
L
X
H
X
X
H
X
X
H
X
X
X
H
X
X
H
X
X
H
X
X
Clock Suspend Mode Entry
Power Down Mode Entry
Active
Any(5)
H
H
L
L
X
X
X
X
X
X
X
X
X
H
L
Clock Suspend Mode Exit
Power Down Mode Exit
Active
L
L
H
H
X
X
X
X
X
X
X
X
X
H
L
Any
(PowerDown)
Data Write/Output Enable
Data Mask/Output Disable
Active
Active
H
H
X
X
L
X
X
X
X
X
X
X
X
H
Note:
1. V = Valid, X = Don't care, L = Logic low, H = Logic high
2. CKEn signal is input level when commands are provided.
CKEn-1 signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BS signal.
4. Device state is 1, 2, 4, 8, and full page burst operation.
5. Power Down Mode can not enter in the burst operation.
When this command is asserted in the burst cycle, device state is clock suspend mode.
6. DQM0-3
Preliminary
5
Rev 1.4
Oct. 2005
ETRON [ ETRON TECHNOLOGY, INC. ]
