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M52D128168A-6BIG2E 参数 Datasheet PDF下载

M52D128168A-6BIG2E图片预览
型号: M52D128168A-6BIG2E
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 8MX16, CMOS, PBGA54, FBGA-54]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 47 页 / 1475 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M52D128168A (2E)  
Operation Temperature Condition -40°C~85°C  
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)  
-5  
-6  
-7  
Parameter  
Symbol  
Unit Note  
Min  
5
Max  
Min  
6
Max  
Min  
7
Max  
CAS Latency =3  
CLK cycle time  
t
CC  
1000  
1000  
1000  
ns  
ns  
1
1
CAS Latency =2  
CAS Latency =3  
CAS Latency =2  
10  
10  
10  
4.5  
7
5
7
6
8
CLK to valid  
output delay  
t
SAC  
Output data hold time  
CLK high pulse width  
CLK low pulse width  
Input setup time  
t
OH  
CH  
2
2
2
2
1
1
2
2
2
2
1
1
2.5  
2.5  
2.5  
2
ns  
ns  
ns  
ns  
ns  
ns  
2
3
3
3
3
2
t
t
CL  
SS  
t
Input hold time  
t
SH  
1.5  
1
CLK to output in Low-Z  
t
SLZ  
CAS Latency =3  
CAS Latency =2  
4.5  
7
5
7
6
8
CLK to output in  
Hi-Z  
t
SHZ  
ns  
*All AC parameters are measured from half to half.  
Note: 1. Parameters depend on programmed CAS latency.  
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.  
3. Assumed input rise and fall time (tr & tf)=1ns.  
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to  
the parameter.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Jan. 2016  
Revision: 1.1 6/47