ESMT
M12L2561616A
Operation Temperature Condition -40~85°C
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
Address
Function
BA0~BA1
RFU
A12~A10/AP
RFU
A9
A8
A7
A6
A5
A4
A3
BT
A2
A1
A0
W.B.L.
TM
CAS Latency
Burst Length
Test Mode
CAS Latency
Burst Type
Burst Length
A8
0
A7
Type
A6
A5
0
A4
0
Latency
Reserved
Reserved
2
A3
Type
A2
0
A1
0
A0
0
BT = 0
BT = 1
0
1
0
1
Mode Register Set
Reserved
0
0
0
0
1
1
1
1
0
1
Sequential
Interleave
1
2
4
8
1
2
4
8
0
0
1
0
0
1
1
Reserved
1
0
0
1
0
1
Reserved
1
1
3
0
1
1
0
0
Reserved
Reserved
Reserved
Reserved
1
0
0
Reserved Reserved
Reserved Reserved
Reserved Reserved
Full Page Reserved
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
Full Page Length : 512
POWER UP SEQUENCE
1.Apply power and start clock, Attempt to maintain CKE = ”H”, DQM = ”H” and the other pin are NOP condition at the inputs.
2. Maintain stable power , stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 is regardless of the order.
The device is now ready for normal operation.
Note : 1. RFU(Reserved for future use) should stay “0” during MRS cycle.
2. If A9 is high during MRS cycle, “ Burst Read single write” function will be enabled.
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2008
Revision: 1.2 8/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
