欢迎访问ic37.com |
会员登录 免费注册
发布采购

M11L1644A-50T 参数 Datasheet PDF下载

M11L1644A-50T图片预览
型号: M11L1644A-50T
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, TSOP2-26/24]
分类和应用: 动态存储器光电二极管内存集成电路
文件页数/大小: 16 页 / 200 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
 浏览型号M11L1644A-50T的Datasheet PDF文件第5页浏览型号M11L1644A-50T的Datasheet PDF文件第6页浏览型号M11L1644A-50T的Datasheet PDF文件第7页浏览型号M11L1644A-50T的Datasheet PDF文件第8页浏览型号M11L1644A-50T的Datasheet PDF文件第10页浏览型号M11L1644A-50T的Datasheet PDF文件第11页浏览型号M11L1644A-50T的Datasheet PDF文件第12页浏览型号M11L1644A-50T的Datasheet PDF文件第13页  
M11B1644A / M11B1644SA  
M11L1644A / M11L1644SA  
READ WRITE CYCLE  
(LATE WRITE and READ-MODIFY-WRITE CYCLES)  
tR W C  
tR A S  
tR P  
VI H  
VI L  
RA S  
tC S H  
t
R S H  
tC R P  
tC A S  
tR C D  
VI H  
VI L  
CA S  
tA R  
tR A L  
tC A H  
tR A D  
tR A H  
tA S C  
tA S R  
tA C H  
VI H  
VI L  
AD D R  
RO W  
C O LU M N  
R OW  
tC W L  
tR W L  
t W P  
t
R W D  
tC W D  
tA W D  
tR C S  
VI H  
VI L  
WE  
t A A  
tR A C  
t
C A C  
tD H  
tD S  
tC L Z  
V I / O  
V I / O  
H
I/O  
VAL ID D O U T  
VA LI D DI N  
OPEN  
L
tO  
A C  
tO E H  
tO  
F F 2  
V I H  
V I L  
OE  
EDO-PAGE-MODE READ CYCLE  
tR A S C  
tR P  
VI H  
VI L  
RAS  
CAS  
tP C  
( N OT E2)  
tC S H  
tR C D  
tR S H  
tC A S  
t
C R P  
tC A S  
tC A S  
tC P  
tC P  
t
C P  
VI H  
VI L  
tA R  
tA S C  
tA C H  
tR A L  
t
C A H  
tA C H  
tC A H  
tR A D  
tA C H  
C A H  
tA S C  
tA S R  
t
R A H  
tA S C  
t
V I H  
V I L  
AD DR  
C O LU M N  
CO L UM N  
R OW  
R O W  
C O LU M N  
tR R H  
tR C H  
t
R C S  
VI H  
VI L  
W E  
tA A  
tA C P  
tC A C  
t A A  
tA C P  
tC A C  
tA A  
tR A C  
tC A C  
NO TE 1  
tC L Z  
t
C L Z  
tC O H  
tO  
F F 1  
VO H  
VO L  
V A L I D  
I/O  
VALID DATA  
tO F  
OPEN  
VAL ID D AT A  
OPEN  
D A T A  
t
O E H C  
tO  
A C  
tO  
A C  
F 2  
tO E S  
tO  
F F 2  
tO  
E S  
VI H  
VI L  
OE  
tO E P  
DON'T CARE  
UNDEFINED  
OFF1  
PC  
*NOTE : 1. t  
is referenced from the rising edge of RAS or CAS , whichever occurs last.  
2. t can be measured from falling edge of CAS to falling edge of CAS , or from rising edge of CAS to rising edge of  
PC  
CAS . Both measurements must meet the t specification.  
Elite Semiconductor Memory Technology Inc.  
Publication Date : May. 2001  
Revision : 1.1 9/16