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M11L16161SA-45J 参数 Datasheet PDF下载

M11L16161SA-45J图片预览
型号: M11L16161SA-45J
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM, 1MX16, 45ns, CMOS, PDSO42, SOJ-42]
分类和应用: 动态存储器光电二极管内存集成电路
文件页数/大小: 16 页 / 202 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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M11B16161A / M11B16161SA  
M11L16161A / M11L16161SA  
ABSOLUTE MAXIMUM RATINGS  
Voltage on Any pin Relative to Vss  
Permanent device damage may occur if “Absolute  
Maximum Ratings” are exceeded. This is a stress rating  
only, and functional operation of the device above those  
conditions indicated in the operational sections of this  
specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may  
affect reliability.  
5V Product  
3.3V Product  
… ……-1V to +7V  
… ……-0.5V to +4.6V  
A
° to +70°  
C C  
Operating Temperature, T (ambient) ….0  
Storage Temperature (plastic) ……….-55 ° to +150°  
C
C
Power Dissipation …………………………………1.0W  
Short Circuit Output Current ……………………50mA  
DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED  
OPERATING CONDITIONS (0 °C T  
A 70 °C )  
3.3V  
5V  
PARAMETER  
CONDITIONS  
SYMBOL  
UNITS NOTES  
MIN  
3.0  
0
MAX  
3.6  
0
MIN  
4.5  
0
MAX  
5.5  
0
CC  
Supply Voltage  
V
V
V
1
SS  
V
Supply Voltage  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
IH  
CC  
CC  
V
2.0  
-1.0  
-10  
V
+0.3  
2.4  
-1.0  
-10  
V
+0.3  
V
1
1
IL  
V
0.8  
0.8  
V
µ A  
IN  
IH(max)  
LI  
0V V V  
I
10  
10  
10  
10  
0V VOUT VCC  
Output Leakage Current  
Output High Voltage  
µ A  
LO  
I
-10  
2.4  
-
-10  
2.4  
-
Output(s) disable  
OH  
5V  
3.3V  
5V  
I
I
I
I
= -5 mA  
= -2 mA  
= 4.2 mA  
= 2 mA  
OH  
V
-
-
V
V
OH  
OL  
OL  
Output Low Voltage  
OL  
V
0.4  
0.4  
3.3V  
SS  
Note : 1.All Voltages referenced to V  
MAX  
-50  
PARAMETER  
CONDITIONS  
SYMBOL  
UNITS NOTES  
-45  
-60  
CC1  
Operating Current  
I
150 140 130  
mA  
mA  
1,2  
RC  
RAS , CAS cycling , t =min  
IH  
TTL interface ,RAS , CAS = V  
,
4
4
4
OUT  
D
=High-Z  
CC2  
Standby Current  
I
mA  
mA  
mA  
CC  
CMOS interface, RAS , CAS V -0.2V  
2
2
2
RC  
t
= min  
= min  
150 140 130  
150 140 130  
2
CC3  
RAS only refresh Current  
EDO Page Mode Current  
I
PC  
RC  
CC4  
t
I
1,3  
CAS BeforeRAS Refresh  
Current  
t
= min  
150 140 130  
500 500 500  
500 500 500  
mA  
µ A  
µ A  
CC6  
I
RC  
Standby with CBR refresh, t = 62.4us  
Battery Backup Current  
(S-ver. Only)  
CC7  
I
RAS  
300ns, D  
OUT  
t
=Hi-Z, CMOS interface  
Self Refresh Current  
(S-ver. Only)  
OUT  
RAS , CAS 0.2V, D  
=Hi-Z, CMOS  
CC8  
I
interface  
CC  
Note : 1.I max is specified at the output open condition.  
IL .  
2. Address can be changed twice or less while RAS =V  
IH  
3. Address can be changed once or less while CAS =V  
.
Elite Semiconductor Memory Technology Inc.  
Publication Date : May. 2001  
Revision : 1.3 3/16