EM78P458/459
OTP ROM
4. FUNCTION DESCRIPTION
WDT Timer
P C
STACK 0
STACK 1
STACK 2
STACK 3
STACK 4
STACK 5
STACK 6
STACK 7
WDT
Time-out
Prescaler
Oscillator/
Timming
Control
/INT
ROM
Interrupt
Control
Instruction
Register
ENTCC
R1(TCC)
ALU
Instruction
Decoder
Sleep
&
RAM
Wake Up
Control
R3
ACC
R4
DATA & CONTROL BUS
Comparators
2 PWMs
8 ADC
IOC5
R5
IOC6
R6
PPPPPPPP
55555555
01234567
PPPPPPPP
66666666
01234567
Fig. 2 The Functional Block Diagram of EM78P458/459
4.1 Operational Registers
1. R0 (Indirect Addressing Register)
R0 is not a physically implemented register. Its major function is to perform as an indirect addressing
pointer. Any instruction using R0 as a pointer, actually accesses data pointed by the RAM Select
Register (R4).
2. R1 (Time Clock /Counter)
• Increased by an external signal edge through the TCC pin, or by the instruction cycle clock.
• The signals to increase the counter are decided by Bit 4 and Bit 5 of the CONT register.
• Writable and readable as any other registers.
3. R2 (Program Counter) & Stack
• R2 and hardware stacks are 12-bit wide. The structure is depicted in Fig. 4.
• Generates 4K×13 bits on-chip ROM addresses to the relative programming instruction codes. One
program page is 1024 words long.
• The contents of R2 are set to all "0"s upon a RESET condition.
This specification is subject to change without prior notice.
8
06.25.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
