EM78P447S
OTP ROM
3. PIN ASSIGNMENT
P55
P54
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
P56
2
P57
/RESET
OSCI
OSCO
P77
TCC
VDD
NC
3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/RESET
OSCI
OSCO
P77
Vss
TCC
VDD
/INT
P50
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/RESET
OSCI
OSCO
P77
TCC
VDD
NC
1
2
1
2
4
5
3
3
Vss
6
Vss
4
4
P76
/INT
P50
7
/INT
P50
P51
P52
P53
P60
P61
P62
P63
P64
5
P76
5
P76
P75
8
P51
6
P75
6
P75
P74
P51
9
7
P74
7
P74
P52
10
11
12
13
14
15
16
P73
P72
P71
P70
P67
P66
P65
P52
8
8
P73
P73
P53
9
9
P53
P60
P61
P62
P63
P64
P60
P72
P72
10
11
12
13
14
10
11
12
13
14
P61
P71
P71
P62
P70
P70
P63
P67
P67
P64
Vss
P66
P66
P65
P65
Fig. 1 Pin Assignment
Table 1 EM78P447SAP and EM78P447SAM Pin Description
Symbol Pin No.
Type
-
Function
VDD
2
* Power supply.
* XTAL type: Crystal input terminal or external clock input pin.
* RC type: RC oscillator input pin.
* XTAL type: Output terminal for crystal oscillator or external clock input pin.
* RC type: Instruction clock output.
OSCI
27
I
I/O
I
OSCO
26
* External clock signal input.
* The real time clock/counter (with Schmitt trigger input pin) must be tied to
VDD or VSS if not in use.
TCC
1
* Input pin with Schmitt trigger. If this pin remains at logic low, the controller
will also remain in reset condition.
/RESET
28
I
P50~P53 6~9
P60~P67 10~17
I/O
I/O
* P50~P53 are bi-directional I/O pins.
* P60~P67 are bi-directional I/O pins. These can be pulled-high internally
by software control.
* P70~P77 are bi-directional I/O pins.
* P74~P75 can be pulled-high internally by software control.
* P76~P77 can have open-drain output by software control.
* P70 and P71 can also be defined as the R-option pins.
* External interrupt pin triggered by falling edge.
* Ground.
P70~P77 18~25
I/O
/INT
VSS
NC
5
4
3
I
-
-
* No connection.
This specification is subject to change without prior notice.
6
06.25.2003 (V1.1)
ELAN [ ELAN MICROELECTRONICS CORP ]
