EM78P257
OTP ROM
* Wake up from sleep mode when the status of the pin changes.
* Default value after a power on reset.
IR OUT
14
O
* IR mode output pin, capable of sinking 20mA
/INT
7
I
I
I
I
I
O
O
I
* External interrupt pin triggered by falling edge.
* “ -“ -> the input pin of Vin- of a comparator.
* “ +” -> the input pin of Vin+ of a comparator.
* Pin CO1~4 are the outputs of the comparators.
CIN1-, CIN1+
CIN2-, CIN2+
CIN3-, CIN3+
CIN4-, CIN4+
CO1,CO2
CO3,CO4
TCC
18,19
3,2
8,9
13,12
20,1
10,11
3
External Counter input.
TCC1,TCC2
TCC3,TCC4
/RESET
8,13
20,19
4
I
* If set as /RESET and remains at logic low, the device will be reset.
* Voltage on /RESET/Vpp must not exceed Vdd during the normal
mode.
* Pull_high is on if defined as /RESET.
VSS
5,6
-
Ground.
P56/TCC5
P52/CO2
1
2
20
19
18
17
16
15
14
13
12
11
P57/TCC6
P51/CO1/TCC3
P50/CIN1+/TCC4
P55/CIN1-/OSCI
P70/OSCO
P53/CIN2+
P54/CIN2-/TCC
P71//RESET
Vss
3
4
5
6
VDD
P60//INT
7
P67/IR OUT
P66/CIN4-/TCC2
P65/CIN4+
P61/CIN3-/TCC1
P62/CIN3+
P63/CO3
8
9
10
P64/CO4
Fig. 2 Pin Assignment - EM78P257BP/BM
Table 3 Pin Description-EM78P257BP/BM/BKM
Symbol Pin No. Type
VDD
Function
15
17
-
I
Power supply.
OSCI
* XTAL type: Crystal input terminal or external clock input pin.
* RC type: RC oscillator input pin.
OSCO
16
I/O * XTAL type: output terminal for crystal oscillator or external clock
input pin.
This specification is subject to change without prior notice.
8
07.27.2004 (V1.4)