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EM78P257AP 参数 Datasheet PDF下载

EM78P257AP图片预览
型号: EM78P257AP
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-BIT MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 91 页 / 1917 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P257  
OTP ROM  
Table 1 Pin Description- EM78P257AP/AM  
Symbol  
VDD  
OSCI  
Pin No.  
14  
Type  
Function  
-
I
Power supply.  
16  
* XTAL type: Crystal input terminal or external clock input pin.  
* RC type: RC oscillator input pin.  
OSCO  
15  
I/O * XTAL type: output terminal for crystal oscillator or external clock  
input pin.  
* RC type: clock output with a duration of one instruction cycle.  
* External clock signal input.  
P70~P71  
P60~P67  
4,15  
I/O * General purpose I/O pin. (P71 is input pin only)  
* Default value after a power on reset.  
I/O * General purpose I/O pin.  
6~13  
* Open_drain  
* Default value after a power on reset.  
P50~P55  
1~3  
I/O * General purpose I/O pin.  
16~18  
* Pull_high/pull_down.  
* Wake up from sleep mode when the status of the pin changes.  
* Default value after a power on reset.  
IR OUT  
/INT  
13  
6
16,17  
3,2  
7,8  
12,11  
18,1  
9,10  
3
O
I
I
I
I
* IR mode output pin, capable of sinking 20mA  
* External interrupt pin triggered by falling edge.  
* “ -“ -> the input pin of Vin- of a comparator.  
* “ +” -> the input pin of Vin+ of a comparator.  
* Pin CO1~4 are the outputs of the comparators.  
CIN1-,CIN1+  
CIN2-,CIN2+  
CIN3-,CIN3+  
CIN4-,CIN4+  
CO1,CO2  
CO3,CO4  
TCC  
I
O
O
I
* External Counter input.  
TCC1,TCC2,  
TCC3,TCC4  
/RESET  
,7,12  
18,17  
4
I
* If set as /RESET and remains at logic low, the device will be reset.  
* Voltage on /RESET/Vpp must not exceed Vdd during the normal  
mode.  
* Pull_high is on if defined as /RESET.  
VSS  
5
-
Ground.  
Table 2 Pin Description- EM78P257AKM  
Symbol Pin No. Type  
VDD  
Function  
15,16  
18  
-
I
Power supply.  
OSCI  
* XTAL type: Crystal input terminal or external clock input pin.  
* RC type: RC oscillator input pin.  
OSCO  
17  
I/O * XTAL type: output terminal for crystal oscillator or external clock  
input pin.  
* RC type: clock output with a duration of one instruction cycle.  
* External clock signal input.  
P70,P71  
P60~P67  
17,4  
I/O * General purpose I/O pin. (P71 is input pin only)  
* Default value after a power on reset.  
I/O * General purpose I/O pin.  
7~14  
* Open_drain.  
* Default value after a power on reset.  
P50~P55  
1~3  
I/O * General purpose I/O pin.  
18~20  
* Pull_high/pull_down.  
This specification is subject to change without prior notice.  
7
07.27.2004 (V1.4)