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EM73P362BQ 参数 Datasheet PDF下载

EM73P362BQ图片预览
型号: EM73P362BQ
PDF下载: 下载PDF文件 查看货源
内容描述: 4位微控制器的液晶显示器产品 [4-BIT MICRO-CONTROLLER FOR LCD PRODUCT]
分类和应用: 显示器微控制器
文件页数/大小: 44 页 / 407 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM73P362  
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT  
PROGRAM EXAMPLE: Store immediate data #Ah into RAM of address 35h.  
LDL#5h;  
LDH #3h;  
STDMI #0Ah; RAM[35] Ah  
(3) For instruction : SELP, CLPL, TFPL, L register be a pointer to indicate the bit of I/O port.  
When LR = 0 - 1, indicate P4.0 - P4.1.  
PROGRAM EXAMPLE: To set bit 1 of Port 4 to "1"  
LDL #01h;  
SEPL ; P4.1 1  
STACK POINTER (SP)  
Stack pointer is a 4-bit register which stores the present stack level number.  
Before using stack, user must set the SP value first, CPU will not initiate the SP value after reset condition.  
When a new subroutine is accepted, the SP will be decreased one automatically, in another word, if  
returning from a subroutine, the SP will be increased one.  
The data transfer between ACC and SP is by instruction of "LDASP" and "STASP".  
DATA POINTER (DP)  
Data pointer is a 12-bit register which stores the address of ROM can indicate the ROM code data  
specified by user (refer to data ROM).  
CLOCK AND TIMING GENERATOR  
The clock generator is supported by a single clock system, the clock source comes from crystal (resonator)  
or RC oscillation, the working frequency range is 32 KHz to 100 KHz depending on the working voltage.  
CLOCK AND TIMING GENERATOR STRUCTURE  
The clock generator connects outside compoments (crystal or resonator by XIN and XOUT pin for crystal  
osc type, capacitor for RC osc type, these two type is decided by mask option) the clock generator  
generates a basic system clock "fc".  
When CPU sleeping, the clock generator will be stopped until the sleep condition released.  
The system clock control generates 4 basic phase signals (S1, S2, S3, S4) and system clock.  
Mask option  
sleep  
Mask option for choose Crystal or RC oscillation  
XIN  
System clock  
fc  
clock generator  
System clock control  
XOUT  
S1  
S2  
S3  
S4  
* This specification are subject to be changed without notice.  
12  
11.1.2001  
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