EM73962A
4-BIT MICROCONTROLLER
PC 0
0
a
a
a
a
a
a
a
a
a
a
a
RET
Object code: 0100 1111
Condition: PC ← STACK[SP]; SP + 1
PC
The return address stored in stack
RT I
Object code: 0100 1101
Condition : FLAG. PC ← STACK[SP]; EI ← 1; SP + 1
PC
The return address stored in stack
(3) Interrupt acceptance operation:
When an interrupt is accepted, the original PC is pushed into stack and interrupt vector will be loaded into
PC,The interrupt vectors are as following:
INT0 (External interrupt from P8.2)
PC 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
1
1
0
1
0
0
0
0
TRGA (Timer A overflow interrupt)
PC 0
0
0
0
0
0
0
0
TRGB (Time B overflow interrupt)
PC 0
TBI (Time base interrupt)
PC 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
INT1 (External interrupt from P8.0)
PC 0
(4) Reset operation:
PC 0
0
0
0
0
0
0
0
0
0
0
0
0
(5) Other operations:
For 1-byte instruction execution: PC + 1
For 2-byte instruction execution: PC + 2
For 3-byte instruction execution: PC + 3
* This specification are subject to be changed without notice.
10.8.2001
9
ELAN [ ELAN MICROELECTRONICS CORP ]
