EM25LV010
1 Megabit (128K x 8) Serial Flash Memory
SPECIFICATION
b7
b0
0
0
0
WEL BUSY
BP1 BP0
SRWD
Status Register Write Protect
Block Protect Bits
Write Enable Latch Bit
BUSY Bit
Table 3: Status Register Format
Status Register
Memory Contents
Content
BP1 Bit BP0 Bit Protected Area
Unprotected Area
*
0
0
1
1
0
1
0
1
None
All blocks (4 blocks: 0, 1, 2. & 3)
Upper quarter (Block 3)
Upper half (2 blocks: 2 and 3)
All blocks (4 blocks: 0, 1, 2. & 3)
Lower three-quarters (3 blocks: 0 to 2)
Lower half (Two blocks: 0 and 1)
None
*
The device is ready to accept a Chip Erase instruction provided that both Block Protects
(BP1 and BP0) are set to “0”.
Table 4: Protected Area Sizes
This specification is subject to change without further notice. (11.08.2004 V1.0)
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ELAN [ ELAN MICROELECTRONICS CORP ]
